SM05 THRU SM36
TVS Diode Array
PROTECTION PRODUCTS
Description
The SM series of transient voltage suppressors (TVS)
are designed to protect components which are
connected to data and transmission lines from voltage
surges caused by
ESD
(electrostatic discharge),
EFT
(electrical fast transients), and
lightning.
TVS diodes are characterized by their high surge
capability, low operating and clamping voltages, and
fast response time. This makes them ideal for use as
board level protection of sensitive semiconductor
components. The dual-junction common-anode design
allows the user to protect one bidirectional data line or
two unidirectional lines. The low profile SOT23
package allows flexibility in the design of crowded
circuit boards.
The SM series will meet the surge requirements of IEC
61000-4-2 (Formerly IEC 801-2), Level 4, Human
Body Model for air and contact discharge.
Features
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300 watts peak pulse power (tp = 8/20µs)
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Transient protection for data & power lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (tp=5/50ns)
IEC 61000-4-5 (Lightning) 12A (tp=1.2/50µs)
Protects one bidirectional line or two unidirectional
lines
Working Voltages: 5V, 12V, 15V, 24 and 36V
Low clamping voltage
Solid-state silicon avalanche technology
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Mechanical Characteristics
JEDEC SOT23 package
Molding compound flammability rating: UL 94V-0
Marking : Marking Code
Packaging : Tape and Reel per EIA 481
Applications
Cellular Handsets and Accessories
Portable Electronics
Industrial Controls
Set-Top Box
Servers, Notebook, and Desktop PC
Circuit Diagram
Schematic & PIN Configuration
SOT23 (Top View)
Revision 9/2000
1
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SM05 THRU SM36
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Peak Pulse Pow er (tp = 8/20µ s)
Th ermal Resistance, Junction to A mb ient
Lead Sold ering Temp erature
Op erating Temp erature
Storage Temp erature
Symbo l
P
p k
q
JA
T
L
T
J
T
STG
Value
300
556
260 (10 sec.)
-55 to +125
-55 to +150
Units
Watts
°C/W
°C
°C
°C
Electrical Characteristics
SM05
Par ame te r
Reverse Stand -Off Voltage
Reverse Breakd ow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Maximum Peak Pulse Current
Junction Cap acitance
Junction Cap acitance
Symbo l
V
RWM
V
BR
I
R
V
C
I
p p
C
j
C
j
I
t
= 1mA
V
RWM
= 5V, T=25°C
I
PP
= 1A ,
tp = 8/20µ s
tp = 8/20µ s
Pi n 1 t o 2
V
R
= 0V, f = 1MHz
Pin 1 to 3 and
Pi n 2 t o 3
V
R
= 0V, f = 1MHz
6
20
9.8
17
350
400
Co nd itio ns
Minimum
Typ ical
Maximum
5
Units
V
V
µA
V
A
pF
pF
SM12
Par ame te r
Reverse Stand -Off Voltage
Reverse Breakd ow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Maximum Peak Pulse Current
Junction Cap acitance
Junction Cap acitance
Symbo l
V
RWM
V
BR
I
R
V
C
I
p p
C
j
C
j
I
t
= 1mA
V
RWM
= 12V, T=25°C
I
PP
= 1A ,
tp = 8/20µ s
tp = 8/20µ s
Pi n 1 t o 2
V
R
= 0V, f = 1MHz
Pin 1 to 3 and
Pi n 2 t o 3
V
R
= 0V, f = 1MHz
13.3
1
19
12
120
150
Co nd itio ns
Minimum
Typ ical
Maximum
12
Units
V
V
µA
V
A
pF
pF
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SM05 THRU SM36
PROTECTION PRODUCTS
Electrical Characteristics
(Continued)
SM15
Par ame te r
Reverse Stand -Off Voltage
Reverse Breakd ow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Maximum Peak Pulse Current
Junction Cap acitance
Junction Cap acitance
SM24
Par ame te r
Reverse Stand -Off Voltage
Reverse Breakd ow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Maximum Peak Pulse Current
Junction Cap acitance
Junction Cap acitance
Symbo l
V
RWM
V
BR
I
R
V
C
I
p p
C
j
C
j
I
t
= 1mA
V
RWM
= 24V, T=25°C
I
PP
= 1A , tp = 8/20µ s
tp = 8/20µ s
Pi n 1 t o 2
V
R
= 0V, f = 1MHz
Pin 1 to 3 and 2 to 3
V
R
= 0V, f = 1MHz
26.7
1
43
5
50
60
Co nd itio ns
Minimum
Typ ical
Maximum
24
Units
V
V
µA
V
A
pF
pF
Symbo l
V
RWM
V
BR
I
R
V
C
I
p p
C
j
C
j
Co nd itio ns
Minimum
Typ ical
Maximum
15
Units
V
V
I
t
= 1mA
V
RWM
= 15V, T=25°C
I
PP
= 1A , tp = 8/20µ s
tp = 8/20µ s
Pi n 1 t o 2
V
R
= 0V, f = 1MHz
Pin 1 to 3 and 2 to 3
V
R
= 0V, f = 1MHz
16.7
1
24
10
75
100
µA
V
A
pF
pF
SM36
Par ame te r
Reverse Stand -Off Voltage
Reverse Breakd ow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Maximum Peak Pulse Current
Junction Cap acitance
Junction Cap acitance
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2000 Semtech Corp.
Symbo l
V
RWM
V
BR
I
R
V
C
I
p p
C
j
C
j
Co nd itio ns
Minimum
Typ ical
Maximum
36
Units
V
V
I
t
= 1mA
V
RWM
= 36V, T=25°C
I
PP
= 1A , tp = 8/20µ s
tp = 8/20µ s
Pi n 1 t o 2
V
R
= 0V, f = 1MHz
Pin 1 to 3 and 2 to 3
V
R
= 0V, f = 1MHz
3
40
1
60
4
40
45
µA
V
A
pF
pF
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SM05 THRU SM36
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
110
100
Power Derating Curve
Peak Pulse Power - P
PP
(kW)
90
% of Rated Power or I
PP
80
70
60
50
40
30
20
10
0
1
0.1
0.01
0.1
1
10
Pulse Duration - tp (µs)
100
1000
0
25
50
75
100
o
125
150
Ambient Temperature - T
A
( C)
Pulse Waveform
110
100
90
80
Percent of I
PP
70
60
50
40
30
20
10
0
0
5
10
15
Time (µs)
20
25
30
td = I
PP
/2
e
-t
Waveform
Parameters:
tr = 8µs
td = 20µs
ESD Pulse Waveform (Per IEC 61000-4-2)
Level
IEC 61000-4-2 Discharge Parameters
First
Peak
Current
(A)
1
2
3
4
7.5
15
22.5
30
Peak
Current
at 30 ns
(A)
4
8
12
16
Peak
Current
at 60 ns
(A)
8
4
6
8
Test
Test
Voltage
Voltage
(Contact
( A ir
Disch arge) Disch arge)
(kV )
(kV )
2
4
6
8
2
4
8
15
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SM05 THRU SM36
PROTECTION PRODUCTS
Applications Information
Device Connection Options
The SM series is designed to protect one bidirectional
or two unidirectional data or I/O lines operating at 5 to
36 volts. Connection options are as follows:
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Device Schematic & Pin Configuration
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Bidirectional:
Pin 1 is connected to the data line
and pin 2 is connected to ground (Since the device
is symmetrical, these connections may be re-
versed). For best results, the ground connection
should be made directly to a ground plane on the
board. The path length should be kept as short as
possible to minimize parasitic inductance. Pin 3 is
not connected.
Unidirectional:
Data lines are connected to pin 1
and pin 2. Pin 3 is connected to ground. For best
results, this pin should be connected directly to a
ground plane on the board. The path length should
be kept as short as possible to minimize parasitic
inductance.
RS-232 Transceiver Protection Example
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of fast rise-time transients such as ESD. The following
guidelines are recommended (Refer to application note
SI99-01 for more detailed information):
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Place the TVS near the input terminals or connec-
tors to restrict transient coupling.
Minimize the path length between the TVS and the
protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
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