三合微科股½有限公司
S
AM
H
OP
Microelectronics Corp.
SM5032C/D
DECODER
GENERAL DESCRIPTION
SM5032C/D is an infrared remote control
decoder utilizing COMOS technology, paired
with SM5021 for transmitter. The remote
control system is capable of controlling eight
functions and CP1 to CP6 can multi-decode.
There is an option for two toggle signal
outputs in these data control functions.
Also there are two custom codes for user to
separate different products.
FEATURES
* Wide operation voltage range, 2.4V to 6V
* Infrared remote control receiver
* Two custom code to separate products
* Eight control functions for continuous signal
* Mulit-key control outputs
* Two toggle signal can be optioned in outputs
* A single terminal type oscillator by means of
RC is provided
* Low power consumption
* High noise immunity
APPLICATIONS
* Consumer Products Remote Control
* Toy Remote Control
* Audio Remote Control
* 14 pin DIP or SO package
PIN ASSIGNMENTS
Vss
DI
CP1
CP2
CP3
CP4
CP5
1
2
3
4
5
6
7
14
13
12
11
10
9
8
SM5032C
V
DD
OSC
C1
C2
TP1
TP2
CP6
Vss
DI
CP1
CP2
CP3
CP4
CP5
1
2
3
4
5
6
7
14
13
12
11
10
9
8
SM5032D
V
DD
OSC
C1
C2
CP8
CP7
CP6
Page 1
V.1.0 May 28,2002
三合微科股½有限公司
S
AM
H
OP
Microelectronics Corp.
SM5032C/D
DECODER
BLOCK DIAGRAM
V
DD
Vss
DI
Schmitt-Trigger
Serial To Parallel
Data Decode
6 Bits
C1
Decoder
C2
OSC
Timing Generator
8 Bits
OPTION
Output Driver
CP1 CP2 CP3 CP4 CP5 CP6 CP7 CP8
TP1 TP2
PIN DESCRIPTION
Pin Name
Vss
DI
CP1 ~ CP6
O
CP7,CP8(TP2/TP1)
C1,C2
OSC
V
DD
I
I
POWER
I/O
POWER
I
Function
Negative power supply
Signal Input
Multi-key control outputs
Single-dey control outputs
(Toggle function option)
Custom code
38KHz OSC pin
Positive power supply
Page 2
V.1.0 May 28,2002
三合微科股½有限公司
S
AM
H
OP
Microelectronics Corp.
SM5032C/D
DECODER
FUNCTION DESCRIPTION
A. Decoder Signal Input Format
Bit Format
455KHz/ 192
Logic 1 is
Logic 0 is
EMPTY
Frame Format
There are four frames, each frame contains four fields while receiving:
a) Frame Head / Three-Bits
1 1 0 (Metal Option )
b) Custom Code / Two-Bits
C1
C2
c) Control Word / Seven-Bits
0000001~1000110
d) Synch Filed / Four-Bits of Empty
B. Receiver Code Table
Start Word
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Custom Code B1
C1
C1
C1
C1
C1
C1
C1
C1
C2
C2
C2
C2
C2
C2
C2
C2
0
0
0
0
0
0
1
1
B2
0
0
0
0
0
1
0
0
B3
0
0
0
0
1
0
0
0
B4
0
0
0
1
0
0
0
0
B5
0
0
1
0
0
0
0
1
B6
0
1
0
0
0
0
1
1
B7
1
0
0
0
0
0
1
0
Receiver
CP1
CP2
CP3
CP4
CP5
CP6
CP7/TP2
CP8/TP1
Page 3
V.1.0 May 28,2002
三合微科股½有限公司
S
AM
H
OP
Microelectronics Corp.
SM5032C/D
DECODER
C. Receiver Waveform
Normal Condition ( Paired With SM5021A )
K1 K1 K1 K1 K2 K2 K2 K2
K1 K1 K1 K1 K1 K1 K1 K1
K2 K2 K2 K2
D1
F
F
F
F F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
t<81ms
t=81ms
t>81ms
CP1
CP2
K7 K7 K7 K7
K3 K3 K3 K3
K7 K7 K7 K7
K3 K3 K3 K3
K7 K7 K7 K7
D1
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
t
≦
81ms
t
≦
81ms
t
≦
81ms
TP1
CP3
Overlap Condition ( Paired With SM5021B )
If more than one data is received, multi-key decode available. ( Except for CP7/CP8 or TP1/TP2)
K1 K1 K1 K1
K2
[K2+K1]
K1 K1 K1 K1 K1
[K2+K1]
K1 K1 K1 K1
D1
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
t<81ms
t>81ms
t<81ms
CP1
CP2
K7
[K7+K3]
K3 K7 K7
[K7+K3]
K3 K3 K3 K3 K3 K7 K7 K7 K7
D1
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
t<81ms
TP1
CP3
Page 4
V.1.0 May 28,2002
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