XC6501
■GENERAL
DESCRIPTION
ETR0337-003
Output Capacitor-Less, Low Power Consumption, High Speed LDO Regulator
The XC6501 series is a 6.0V high speed, low noise CMOS LDO regulator that can provide stable output voltages within a range
of 1.2V to 5.0V (0.05V increments) even without a load capacitor C
L
. This is possible because phase compensation is carried
out internally unlike other LDOs where it is done externally. The series consists of a reference voltage source, driver transistor,
error amplifier, current limit circuit, and phase compensation circuit.
The CE function enables the circuit to be put into stand-by mode by inputting a low level signal to the CE pin thereby reducing
current consumption from an already low 13μA (in operation) to less than 0.1μA. In the stand-by mode, if a C
L
cap is used, the
electric charge stored at C
L
can be discharged via the internal auto-discharge switch and as a result, the V
OUT
pin quickly returns
to the V
SS
level.
The current limit fold-back circuit operates as a short circuit protection and a current limiter function for the output pin.
■APPLICATIONS
●Mobile
phones
（RF,
Digital cash, I/O etc.）
●Portable
games
●Camera
modules
●Wireless
LAN modules
●LCD
modules
●Bluetooth
●Digital-TV
tuners
■FEATURES
Operating Voltage Range
Output Voltage Range
Dropout Voltage
Low Power Supply
Stand-by Current
Ripple Rejection
Protection Circuits
Output capacitor is not required
CL High Speed Auto Discharge
Packages
USP-3, USP-4
SSOT-24, SOT-25
:
:
:
:
:
:
:
:
:
1.4½6.0V
2.0½5.0V（Accuracy:±1%）
1.2½1.95V（Accuracy:±0.02V）
150mV＠I
OUT
=100mA,
V
OUT
=2.8V
13μA＠V
OUT
=2.8V
Less than 0.1μA
50dB＠f=1kHz,V
OUT
=2.8V
Current limit
（300mA,
TYP.）
Short circuit protection
Internal phase compensation
■TYPICAL
APPLICATION CIRCUIT
■TYPICAL
PERFORMANCE
CHARACTERISTICS
XC6501 Series
Ta=25
℃
,tr=tf=5μs
C
IN
=0.1μF (ceramic)
3.2
(V)
3.0
2.8
2.6
2.4
2.2
2.0
Time (40μs/div)
Output Current
300
Output Current: I
OUT
(mA)
Without C
L
C
L
無し
C
L
=1.0μF
250
200
150
100
50
0
Output Voltage: V
OUT
1/21
XC6501 Series
■PIN
CONFIGURATION
*The heat dissipation pad of the USP-4 package is recommended to solder as the
recommended mount pattern and metal mask pattern for mounting strength. The mount
pattern should be electrically opened or connected to the V
SS
(No.2) pin.
■PIN
ASSIGNMENT
PIN NUMBER
USP-3
1
2
3
-
-
USP-4
4
1
2
3
-
SSOT-24
4
3
2
1
-
SOT-25
1
5
2
3
4
PIN NAME
V
IN
V
OUT
V
SS
CE
NC
FUNCTION
Power Supply
Output
Ground
ON/OFFControl
No Connection
■PRODUCT
CLASSIFICATION
●
Ordering Information
XC6501①②③④⑤⑥
DESIGNATOR
DESCRIPTION
SYMBOL
A
B
C
D
P
12½50
1
④
Output Voltage
Accuracy
A
H
G
N
M
R
L
DESCRIPTION
: CE High Active, Without CE Pull-down, Without CL discharge
: CE High Active, Without CE Pull-down, With CL discharge
: CE High Active, With CE Pull-down, Without CL discharge
: CE High Active, With CE Pull-down, With CL discharge
: 3 pin, without CE pin (USP-3)
: ex.)28V
→ ②=2, ③=8
: 0.1V increments
Accuracy 1.2V½1.9V (±0.02V), 2.0½5.0V (±1%)
ex.)1.80V
→ ②=1, ③=8, ④=1
: 0.05V increments
Accuracy 1.25V½1.95V (±0.02V), 2.05½4.95V (±1%)
ex.)1.85V
→ ②=1, ③=8, ④=A
: USP-3 (Only XC6501P)
: USP-4
: SSOT-24
: SOT-25
: Embossed tape, standard feed
: Embossed tape, reverse feed
①
Regulator Type
②③
Output Voltage
⑤
Packages
⑥
Device Orientation
2/21
XC6501
Series
■BLOCK
DIAGRAMS
V
IN
CFB
Current Limit
+
Error
Amp
-
ON/OFF
Control
each
circuit
Voltage
Reference
R1
Current Limit
+
Error
Amp
-
ON/OFF
Control
each
circuit
Voltage
Reference
Rdischg
R2
V
OUT
V
IN
CFB
R1
V
OUT
R2
CE
CE
V
SS
/CE
V
SS
XC6501A Series
XC6501B Series
V
IN
CFB
Current Limit
+
Error
Amp
-
CE
ON/OFF
Control
Voltage
Reference
R1
V
OUT
V
IN
CFB
Current Limit
+
Error
Amp
-
Rdischg
R2
R1
V
OUT
R2
CE
ON/OFF
Control
Voltage
Reference
/CE
each
circuit
V
SS
each
circuit
V
SS
XC6501C Series
XC6501D Series
V
IN
CFB
Current Limit
+
Error
Amp
-
Voltage
Reference
R1
V
OUT
R2
V
SS
*Diodes inside the circuit are an ESD protection diode and a parasitic diode.
＊図のダイオードは、静電保護用のダイオードと寄生ダイオードです。
XC6501P Series
■ABSOLUTE
MAXIMUM RATINGS
PARAMETER
Input Voltage
Output Current
Output Voltage
CE Input Voltage
USP-3
USP-4
Power Dissipation
SSOT-24
SOT-25
SYMBOL
V
IN
I
OUT
V
OUT
V
CE
RATINGS
V
SS
-0.3½+6.5
400
(*1)
V
SS
-0.3½V
IN
+0.3
V
SS
-0.3½+6.5
120
120
150
250
600
（PCB
mounted）
(*2)
-40½+85
-55½+125
UNITS
V
mA
V
V
mW
Pd
Operating Temperature Range
Topr
℃
Storage Temperature Range
Tstg
℃
*1: Pd＞（V
IN
-V
OUT
）×I
OUT
*2: The power dissipation figure shown is PCB mounted and is for reference only. Please refer to page 20 for details.
3/21
XC6501 Series
■ELECTRICAL
CHARACTERISTICS
●XC6501
Series
Ta=25℃
PARAMETER
SYMBOL
CONDITIONS
2.0V＞V
OUT
（
T
）
(*3)
V
CE
=V
IN
, I
OUT
=10mA
2.0V≦V
OUT
（
T
）
V
CE
=V
IN
, I
OUT
=10mA
V
CE
=V
IN
V
CE
=V
IN
, 0.1mA≦I
OUT
≦100mA
V
CE
=V
IN
, I
OUT
=100mA
V
IN
=V
CE
=6.0V, I
OUT
=0½A
V
IN
=6.0V, V
CE
=V
SS
V
OUT(T)
+0.5V≦V
IN
≦6.0V,
V
CE
=V
IN
, I
OUT
=30mA
MIN.
-0.02
(*4)
TYP.
MAX.
+0.02
(*4)
UNITS
CIRCUIT
Output Voltage
V
OUT(E)
(*2)
×0.99
(*4)
V
OUT
（
T
）
×1.01
(*4)
V
①
Maximum Output Current
Load Regulation
Dropout Voltage
(*5)
Supply Current
Stand-by Current
Line Regulation
Input Voltage
Output Voltage
Temperature
Characteristics
I
OUTMAX
ΔV
OUT
Vdif
I
DD
Istby
ΔV
OUT
ΔV
IN
・V
OUT
V
IN
ΔV
OUT
ΔTa・V
OUT
200
-
-
-
1.4
-
15
E-1
E-2
0.01
0.10
-
±100
-
45
0.1
0.20
6.0
-
mA
mV
mV
μA
μA
%/V
V
ppm/℃
①
①
①
②
②
①
①
①
V
CE
=V
IN
, I
OUT
=30mA
-40℃≦Ta≦85℃
V
OUT(T)
≦4.75V
V
IN
=½V
OUT(T)
+1.0½V
DC
+0.5Vp-p
AC
V
CE
=V
IN
, I
OUT
=30mA, f=1kHz
V
OUT(T)
≧4.80V
V
IN
=5.75V
DC
+0.5Vp-p
AC
V
CE
=V
IN
, I
OUT
=30mA, f=1kHz
V
CE
=V
IN
V
CE
=V
IN,
V
OUT
is short-circuited at the
V
SS
level
-
Ripple Rejection
Rate
PSRR
-
50
-
dB
③
Current Limit
Short Circuit Current
CE High Level
Voltage
CE Low Level
Voltage
CE High Level
Current
CE Low Level
Current
CL Auto-Discharge
Resistance
(*8)
I
LIM
I
SHORT
V
CEH
V
CEL
I
CEH
I
CEL
R
DCHG
210
-
1.0
V
SS
300
25
-
-
-
6.0
-
250
400
-
-
6.0
0.25
0.1
10
0.1
300
480
mA
mA
V
V
μA
μA
Ω
Ω
①
①
①
①
①
①
①
V
IN
=V
CE
=6.0V
V
CE
=V
SS
XC6501A/B/P
XC6501C/D
-0.1
3.5
-0.1
-
-
V
IN
=6.0V, V
OUT
=1.2V, V
CE
=V
SS
V
IN
=6.0V, V
OUT
=5.0V, V
CE
=V
SS
Notes:
(*3)
*1: Unless otherwise stated regarding input voltage conditions, V
IN
=V
OUT(T)
+1.0V.
*2: V
OUT(E)
: An actual output voltage when an amply stabilized I
OUT
(V
OUT(T)
+1.0V) is input..
*3: V
OUT(T)
: Nominal output voltage value
*4: V
OUT(E)
: Effective output voltage value
*5: Vdif={V
IN1
– V
OUT1
}
*6: V
OUT1
: A voltage equal to 98% of the output voltage when an amply stabilized I
OUT
(V
OUT(T)
+1.0V) is input.
*7: V
IN1
: The input voltage when V
OUT1
appears as input voltage is gradually decreased.
*8: This function is built in the XC6501B/D series only.
The XC6501A/C series discharges by resistors R1+ R2 only as shown in the block diagrams.
(*7)
(*6)
4/21
XC6501
Series
■ELECTRICAL
CHARACTERISTICS (Continued)
●Voltage
Chart
E-0
OUTPUT
VOLTAGE
(V)
V
OUT(E)
MIN.
1.1800
1.2300
1.2800
1.3300
1.3800
1.4300
1.4800
1.5300
1.5800
1.6300
1.6800
1.7300
1.7800
1.8300
1.8800
1.9300
1.9800
2.0295
2.0790
2.1285
2.1780
2.2275
2.2770
2.3265
2.3760
2.4255
2.4750
2.5245
2.5740
2.6235
2.6730
2.7225
2.7720
2.8215
2.8710
2.9205
MAX.
1.2200
1.2700
1.3200
1.3700
1.4200
1.4700
1.5200
1.5700
1.6200
1.6700
1.7200
1.7700
1.8200
1.8700
1.9200
1.9700
2.0200
2.0705
2.1210
2.1715
2.2220
2.2725
2.3230
2.3735
2.4240
2.4745
2.5250
2.5755
2.6260
2.6765
2.7270
2.7775
2.8280
2.8785
2.9290
2.9795
TYP.
E-1
DROPOUT
VOLTAGE
(mV)
V
dif
MAX.
TYP.
E-2
SUPPLY
CURRENT
(μA)
I
SS
MAX.
NOMINAL
VOLTAGE
(V)
V
OUT(T)
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
2.10
2.15
2.20
2.25
2.30
2.35
2.40
2.45
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
2.95
440
690
300
610
11
17
260
530
230
470
18
200
430
12
190
410
19
210
380
13
20
150
360
5/21
FPGA/CPLD
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