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VS1033

产品描述MP3/AAC/WMA/MIDI AUDIO CODEC
文件大小600KB,共71页
制造商ETC1
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VS1033概述

MP3/AAC/WMA/MIDI AUDIO CODEC

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VS1033a PRELIMINARY
VS1033
A
VS1033 - MP3/AAC/WMA/MIDI
AUDIO CODEC
Features
Decodes MPEG 1 & 2 audio layer III (CBR
+VBR +ABR); layers I & II optional;
MPEG4 / 2 AAC-LC-2.0.0.0 (+PNS);
WMA 4.0/4.1/7/8/9 all profiles (5-384 kbps);
WAV (PCM + IMA ADPCM);
General MIDI / SP-MIDI format 0 files
Encodes IMA ADPCM from microphone
or line input
Streaming support for MP3 and WAV
Bass and treble controls
Operates with a single clock 12..13 MHz.
Can also be used with 24..26 MHz clocks.
Internal PLL clock multiplier
Low-power operation
High-quality on-chip stereo DAC with no
phase error between channels
Stereo earphone driver capable of driving a
30Ω load
I2S interface for external DAC
Separate operating voltages for analog, dig-
ital and I/O
5.5 KiB On-chip RAM for user code / data
Serial control and data interfaces
Can be used as a slave co-processor
SPI flash boot for special applications
UART for debugging purposes
New functions may be added with software
and 8 GPIO pins
Lead-free RoHS-compliant package (Green)
I2S
Description
VS1033 is a single-chip MP3/AAC/WMA/MIDI
audio decoder and ADPCM encoder. It contains
a high-performance, proprietary low-power DSP
processor core VS DSP
4
, working data memory,
5 KiB instruction RAM and 0.5 KiB data RAM
for user applications, serial control and input data
interfaces, upto 8 general purpose I/O pins, an
UART, as well as a high-quality variable-sample-
rate mono ADC and stereo DAC, followed by an
earphone amplifier and a ground buffer.
VS1033 receives its input bitstream through a se-
rial input bus, which it listens to as a system slave.
The input stream is decoded and passed through a
digital volume control to an 18-bit oversampling,
multi-bit, sigma-delta DAC. The decoding is con-
trolled via a serial control bus. In addition to the
basic decoding, it is possible to add application
specific features, like DSP effects, to the user RAM
memory.
mic
audio
line
audio
GPIO
VS1033
MIC AMP
8
GPIO
MUX
audio
Mono
ADC
Stereo
DAC
Stereo Ear−
phone Driver
L
R
output
X ROM
DREQ
SO
SI
SCLK
XCS
XDCS
Serial
Data/
Control
Interface
X RAM
VSDSP
4
Y ROM
RX
TX
UART
Y RAM
Clock
multiplier
Instruction
RAM
Instruction
ROM
Version 0.6,
2005-01-05
1
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