TSM9NB50
500V N-Channel Power MOSFET
TO-220
ITO-220
Pin Definition:
1. Gate
2. Drain
3. Source
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Ω)
500
0.85 @ V
GS
=10V
I
D
(A)
9
General Description
The TSM9NB50 N-Channel enhancement mode Power MOSFET is produced by planar stripe DMOS
technology. This advanced technology has been especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy pulse in the avalanche and commutation mode.
These devices are well suited for high efficiency switch mode power supply, electronic lamp ballast based on half
bridge.
Features
●
●
●
Low R
DS(ON)
0.85Ω (Max.)
Low gate charge typical @ 44nC (Typ.)
Improve dv/dt capability
Block Diagram
Ordering Information
Part No.
TSM9NB50CZ C0
TSM9NB50CI C0
Package
TO-220
ITO-220
Packing
50pcs / Tube
50pcs / Tube
N-Channel MOSFET
Absolute Maximum Rating
(Ta = 25
o
C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current *
Single Pulse Avalanche Energy (Note 2)
Operating Junction Temperature
Storage Temperature Range
* Limited by maximum junction temperature
Tc = 25ºC
Tc = 100ºC
Symbol
V
DS
V
GS
I
D
I
DM
E
AS
T
J
T
STG
Limit
500
±30
9.0
5.4
36
208
150
-55 to +150
Unit
V
V
A
A
A
mJ
ºC
o
C
Thermal Performance
Parameter
Thermal Resistance - Junction to Case
TO-220
ITO-220
Symbol
RӨ
JC
RӨ
JA
Limit
0.9
3.1
62.5
Unit
o
C/W
Thermal Resistance - Junction to Ambient
TO-220 / ITO-220
Notes: Surface mounted on FR4 board t
≤
10sec
1/7
Version: A12
TSM9NB50
500V N-Channel Power MOSFET
Electrical Specifications
(Tc = 25
o
C unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Drain-Source On-State Resistance
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
V
DD
= 250V, I
D
= 9A,
R
G
= 25Ω
t
d(on)
t
r
t
d(off)
--
--
--
--
27.4
46.8
13.3
5.7
--
--
--
--
nS
V
DS
= 400V, I
D
= 8A,
V
GS
= 10V
V
DS
= 25V, V
GS
= 0V,
f = 1.0MHz
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
--
--
--
--
--
--
44
8
27.4
1019
129
15
--
--
--
--
--
--
pF
nC
V
GS
= 0V, I
D
= 250uA
V
GS
= 10V, I
D
= 4.5A
V
DS
= V
GS
, I
D
= 250uA
V
DS
= 500V, V
GS
= 0V
V
GS
= ±30V, V
DS
= 0V
I
S
= 9A, V
GS
= 0V
BV
DSS
R
DS(ON)
V
GS(TH)
I
DSS
I
GSS
V
SD
500
--
2.5
--
--
--
--
0.72
3.3
--
--
0.9
--
0.85
4.5
1
±100
1.5
V
Ω
V
uA
nA
V
Conditions
Symbol
Min
Typ
Max
Unit
Turn-Off Fall Time
t
f
Notes:
1. Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
2. V
DD
= 50V, I
AS
=2.5A, L=60mH, V
DS
=500V
3. Pulse test: pulse width
≤300uS,
duty cycle
≤2%
4. Essentially Independent of Operating Temperature
2/7
Version: A12
TSM9NB50
500V N-Channel Power MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveform
E
AS
Test Circuit & Waveform
3/7
Version: A12
TSM9NB50
500V N-Channel Power MOSFET
Diode Reverse Recovery Time Test Circuit & Waveform
4/7
Version: A12
TSM9NB50
500V N-Channel Power MOSFET
TO-220 Mechanical Drawing
DIM
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
TO-220 DIMENSION
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
10.00
10.50
0.394
0.413
3.74
3.91
0.147
0.154
2.44
2.94
0.096
0.116
--
6.35
--
0.250
0.38
1.10
0.015
0.043
2.34
2.71
0.092
0.107
4.69
5.43
0.185
0.214
12.70
14.73
0.500
0.580
8.38
9.38
0.330
0.369
14.22
16.51
0.560
0.650
3.55
4.82
0.140
0.190
1.16
1.40
0.046
0.055
27.70
29.62
1.091
1.166
2.03
2.92
0.080
0.115
0.25
0.61
0.010
0.024
5.84
6.85
0.230
0.270
5/7
Version: A12
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
