19-3164; Rev 1; 5/04
KIT
ATION
EVALU
BLE
AVAILA
Buffered, Fast-Settling, Quad,
12-/10-/8-Bit, Voltage-Output DACs
Features
♦
3µs (max) 12-Bit Settling Time to 0.5 LSB
♦
Quad, 12-/10-/8-Bit Serial DACs in TSSOP and
Thin QFN (5mm x 5mm x 0.8mm) Packages
♦
±1 LSB (max) INL and DNL at 12-Bit Resolution
♦
Two User-Programmable Digital I/O Ports
♦
Single +2.7V to +5.25V Analog Supply
♦
+1.8V to AV
DD
Digital Supply
♦
20MHz, 3-Wire, SPI-/QSPI-/MICROWIRE-/DSP-
Compatible Serial Interface
♦
Glitch-Free Outputs Power Up to Zero Scale,
Midscale, or Full Scale Controlled by PU Pin
♦
Unity-Gain or Force-Sense-Configured
Output Buffers
General Description
The MAX5580–MAX5585 quad, 12-/10-/8-bit, voltage-
output, digital-to-analog converters (DACs) offer
buffered outputs and a 3µs maximum settling time at the
12-bit level. The DACs operate from a +2.7V to +5.25V
analog supply and a separate +1.8V to +5.25V digital
supply. The 20MHz, 3-wire, serial interface is compati-
ble with SPI™, QSPI™, MICROWIRE™, and digital sig-
nal processor (DSP) protocol applications. Multiple
devices can share a common serial interface in direct-
access or daisy-chained configuration. The MAX5580–
MAX5585 provide two multifunctional, user-programma-
ble, digital I/O ports. The externally selectable power-up
states of the DAC outputs are either zero scale, mid-
scale, or full scale. Software-selectable FAST and SLOW
settling modes decrease settling time in FAST mode, or
reduce supply current in SLOW mode.
The MAX5580/MAX5581 are 12-bit DACs, the
MAX5582/MAX5583 are 10-bit DACs, and the
MAX5584/MAX5585 are 8-bit DACs. The MAX5580/
MAX5582/MAX5584 provide unity-gain-configured out-
put buffers, while the MAX5581/MAX5583/MAX5585
provide force-sense-configured output buffers. The
MAX5580–MAX5585 operate over the extended -40°C
to +85°C temperature range and are available in
space-saving, 5mm x 5mm x 0.8mm, 20-pin, thin QFN
and TSSOP packages.
MAX5580–MAX5585
Ordering Information
PART
MAX5580AEUP*
MAX5580AETP*
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
20 TSSOP-EP**
20 Thin QFN-EP**
*Future
product—contact factory for availability. Specifications
are preliminary.
**EP
= Exposed paddle.
Ordering Information continued at end of data sheet.
Applications
Portable Instrumentation
Automatic Test Equipment (ATE)
Digital Offset and Gain Adjustment
Automatic Tuning
Programmable Voltage and Current Sources
Programmable Attenuators
Industrial Process Controls
Motion Control
Microprocessor (µP)-Controlled Systems
Power Amplifier Control
Fast Parallel-DAC to Serial-DAC Upgrades
PART
MAX5580AEUP
MAX5580AETP
MAX5580BEUP
MAX5580BETP
MAX5581AEUP
MAX5581AETP
MAX5581BEUP
MAX5581BETP
MAX5582EUP
MAX5582ETP
MAX5583EUP
MAX5583ETP
MAX5584EUP
MAX5584ETP
MAX5585EUP
MAX5585ETP
Selector Guide
OUTPUT BUFFER
CONFIGURATION
Unity gain
Unity gain
Unity gain
Unity gain
Force sense
Force sense
Force sense
Force sense
Unity gain
Unity gain
Force sense
Force sense
Unity gain
Unity gain
Force sense
Force sense
RESOLUTION
(BITS)
12
12
12
12
12
12
12
12
10
10
10
10
8
8
8
8
INL
(LSB
max)
±1
±1
±4
±4
±1
±1
±4
±4
±1
±1
±1
±1
±0.5
±0.5
±0.5
±0.5
Pin Configurations appear at end of data sheet.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Buffered, Fast-Settling, Quad,
12-/10-/8-Bit, Voltage-Output DACs
MAX5580–MAX5585
ABSOLUTE MAXIMUM RATINGS
AV
DD
to DV
DD
........................................................................±6V
AGND to DGND ..................................................................±0.3V
AV
DD
to AGND, DGND.............................................-0.3V to +6V
DV
DD
to AGND, DGND ............................................-0.3V to +6V
FB_, OUT_,
REF to AGND ........-0.3V to the lower of (AV
DD
+ 0.3V) or +6V
SCLK, DIN,
CS,
PU,
DSP
to DGND .......-0.3V to the lower of (DV
DD
+ 0.3V) or +6V
UPIO1, UPIO2
to DGND ...............-0.3V to the lower of (DV
DD
+ 0.3V) or +6V
Maximum Current into Any Pin .........................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
20-Pin TSSOP (derate 21.7mW/°C above +70°C)........1739mW
20-Pin Thin QFN (derate 20.8mW/°C above +70°C) ....1667mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= 2.7V to 5.25V, DV
DD
= 1.8V to AV
DD
, AGND = 0, DGND = 0, V
REF
= 2.5V (for AV
DD
= 2.7V to 5.25V), V
REF
= 4.096V (for
AV
DD
= 4.5V to 5.25V), R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
(Note 1)
PARAMETER
STATIC ACCURACY
MAX5580/MAX5581
Resolution
N
MAX5582/MAX5583
MAX5584/MAX5585
V
REF
= 2.5V at
AV
DD
= 2.7V and
V
REF
= 4.096V at
AV
DD
= 5.25V
(Note 2)
MAX5580A/MAX5581A (12 bit)
MAX5580B/MAX5581B (12 bit)
MAX5582/MAX5583 (10 bit)
MAX5584/MAX5585 (8 bit)
±2
±0.5
±0.125
12
10
8
±1
±4
LSB
±1
±0.5
±1
±5
±5
±5
±5
5
MAX5580A/MAX5581A (12 bit)
Gain Error
GE
Full-scale output
MAX5580B/MAX5580B (12 bit)
MAX5582/MAX5583 (10 bit)
MAX5584/MAX5585 (8 bit)
Gain-Error Drift
±20
±5
±2
1
±4
±40
±10
±3
ppm of
FS/°C
LSB
±25
±25
±25
ppm of
FS/°C
mV
LSB
Bits
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Integral Nonlinearity
INL
Differential Nonlinearity
DNL
Guaranteed monotonic (Note 2)
MAX5580A/MAX5581A (12 bit), decimal code = 40
MAX5580B/MAX5581B (12 bit), decimal code = 40
MAX5582/MAX5583 (10 bit), decimal code = 20
MAX5584/MAX5585 (8 bit), decimal code = 5
Offset Error
V
OS
Offset-Error Drift
2
_______________________________________________________________________________________
Buffered, Fast-Settling, Quad,
12-/10-/8-Bit, Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= 2.7V to 5.25V, DV
DD
= 1.8V to AV
DD
, AGND = 0, DGND = 0, V
REF
= 2.5V (for AV
DD
= 2.7V to 5.25V), V
REF
= 4.096V (for
AV
DD
= 4.5V to 5.25V), R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Power-Supply Rejection
Ratio
REFERENCE INPUT
Reference-Input Range
Reference-Input
Resistance
Reference Leakage
Current
DAC OUTPUT CHARACTERISTICS
SLOW mode, full scale
Output-Voltage Noise
FAST mode, full scale
Output-Voltage Range
(Note 3)
DC Output Impedance
Short-Circuit Current
Power-Up Time
Wake-Up Time
Output OUT_ and FB_
Open-Circuit Leakage
Current
DIGITAL OUTPUTS (UPIO_)
Output High Voltage
Output Low Voltage
V
OH
V
OL
I
SOURCE
= 0.5mA
I
SINK
= 2mA
DV
DD
≥
2.7V
Input High Voltage
V
IH
DV
DD
< 2.7V
DV
DD
> 3.6V
Input Low Voltage
Input Leakage Current
Input Capacitance
V
IL
I
IN
C
IN
2.7V
≤
DV
DD
≤
3.6V
DV
DD
< 2.7V
±0.1
10
2.4
0.7 x
DV
DD
0.8
0.6
0.2
±1
µA
pF
V
V
DV
DD
-
0.5
0.4
V
V
AV
DD
= 5V, OUT_ to AGND, full scale, FAST mode
AV
DD
= 3V, OUT_ to AGND, full scale, FAST mode
From DV
DD
, applied until interface is functional
Coming out of shutdown, outputs settled
Programmed in shutdown mode, force-sense
outputs only
Unity-gain output
Force-sense output
Unity gain
Force sense
Unity gain
Force sense
0
0
38
57
45
30
40
0.01
60
85
67
140
110
AV
DD
AV
DD
/ 2
V
Ω
mA
µs
µs
µA
µV
RMS
V
REF
R
REF
Normal operation (no code dependence)
Shutdown mode
0.25
145
200
0.5
1
AV
DD
V
kΩ
µA
SYMBOL
PSRR
CONDITIONS
Full-scale output, AV
DD
= 2.7V to 5.25V
MIN
TYP
200
MAX
UNITS
µV/V
MAX5580–MAX5585
DIGITAL INPUTS (SCLK,
CS,
DIN,
DSP,
UPIO_)
_______________________________________________________________________________________
3
Buffered, Fast-Settling, Quad,
12-/10-/8-Bit, Voltage-Output DACs
MAX5580–MAX5585
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= 2.7V to 5.25V, DV
DD
= 1.8V to AV
DD
, AGND = 0, DGND = 0, V
REF
= 2.5V (for AV
DD
= 2.7V to 5.25V), V
REF
= 4.096V (for
AV
DD
= 4.5V to 5.25V), R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
PU INPUT
Input High Voltage
Input Low Voltage
Input Leakage Current
DYNAMIC PERFORMANCE
Voltage-Output Slew
Rate
SR
FAST mode
SLOW mode
MAX5580/MAX5581 from code 322 to
code 4095 to 0.5 LSB
FAST
mode
MAX5582/MAX5583 from code 10 to
code 1023 to 0.5 LSB
MAX5584/MAX5585 from code 3 to
code 255 to 0.5 LSB
t
S
MAX5580/MAX5581 from code 322 to
code 4095 to 0.5 LSB
SLOW
mode
MAX5582/MAX5583 from code 10 to
code 1023 0.5 LSB
MAX5584/MAX5585 from code 3 to
code 255 to 0.5 LSB
FB_ Input Voltage
FB_ Input Current
Reference -3dB
Bandwidth (Note 5)
Digital Feedthrough
Digital-to-Analog Glitch
Impulse
DAC-to-DAC Crosstalk
Unity gain
Force sense
CS
= DV
DD
, code = zero scale, any digital input
from 0 to DV
DD
and DV
DD
to 0, f = 100kHz
Major carry transition
(Note 6)
200
150
0.1
2
15
0
3.6
1.6
2
1.5
1
3
2.5
2
3
3
2
µs
6
6
4
V
REF
/ 2
0.1
V
µA
kHz
nV-s
nV-s
nV-s
V/µs
V
IH-PU
V
IL-PU
I
IN-PU
PU still considered floating when connected to a
tri-state bus
DV
DD
-
200mV
200
±200
V
mV
nA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Voltage-Output Settling
Time (Note 4), Figure 5
4
_______________________________________________________________________________________
Buffered, Fast-Settling, Quad,
12-/10-/8-Bit, Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= 2.7V to 5.25V, DV
DD
= 1.8V to AV
DD
, AGND = 0, DGND = 0, V
REF
= 2.5V (for AV
DD
= 2.7V to 5.25V), V
REF
= 4.096V (for
AV
DD
= 4.5V to 5.25V), R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
POWER REQUIREMENTS
Analog Supply Voltage
Range
Digital Supply Voltage
Range
AV
DD
DV
DD
SLOW mode, all digital inputs Unity gain
at DGND or DV
DD
, no load,
Force sense
V
REF
= 4.096V
FAST mode, all digital inputs
at DGND or DV
DD
, no load,
V
REF
= 4.096V
Unity gain
Force sense
2.70
1.8
0.9
1.6
1.6
2.3
5.25
AV
DD
1.6
2.4
mA
4
4
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5580–MAX5585
Operating Supply
Current
I
AVDD
+
I
DVDD
Shutdown Supply
Current
I
AVDD(SHDN)
No clocks, all digital inputs at DGND or DV
DD
, all
+
DACs in shutdown mode
I
DVDD(SHDN)
0.5
1
µA
Note 1:
For the force-sense versions, FB_ is connected to its respective OUT_, and VOUT (max) = VREF / 2, unless otherwise noted.
Note 2:
Linearity guaranteed from decimal code 40 to code 4095 for the MAX5580B/MAX5581B (12 bit, B grade), code 20 to code
1023 for the MAX5582/MAX5583 (10 bit), and code 5 to code 255 for the MAX5584/MAX5585 (8 bit).
Note 3:
Represents the functional range. The linearity is guaranteed at VREF = 2.5V (for AVDD from 2.7V to 5.25V), and VREF =
4.096V (for AVDD = 4.5V to 5.25V). See the
Typical Operating Characteristics
section for linearity at other voltages.
Note 4:
Guaranteed by design.
Note 5:
The reference -3dB bandwidth is measured with a 0.1VP-P sine wave on VREF and with full-scale input code.
Note 6:
DC crosstalk is measured as follows: outputs of DACA–DACD are set to full scale and the output of DACD is measured.
While keeping DACD unchanged, the outputs of DACA–DACC are transitioned to zero scale and the
∆V
OUT of DACD
is measured.
_______________________________________________________________________________________
5
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