2 Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash
A Microchip Technology Company
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
The SST39LF200A/400A/800A and SST39VF200A/400A/800A devices are 128K
x16 / 256K x16 / 512K x16 CMOS Multi-Purpose Flash (MPF) manufactured with
SST proprietary, high-performance CMOS SuperFlash technology. The split-gate
cell design and thick oxide tunneling injector attain better reliability and manufac-
turability compared with alternate approaches. The SST39LF200A/400A/800A
write (Program or Erase) with a 3.0-3.6V power supply. The SST39VF200A/400A/
800A write (Program or Erase) with a 2.7-3.6V power supply. These devices con-
form to JEDEC standard pinouts for x16 memories.
Features:
• Organized as 128K x16 / 256K x16 / 512K x16
• Single Voltage Read and Write Operations
– 3.0-3.6V for SST39LF200A/400A/800A
– 2.7-3.6V for SST39VF200A/400A/800A
• Fast Erase and Word-Program
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Word-Program Time: 14 µs (typical)
– Chip Rewrite Time:
2 seconds (typical) for SST39LF/VF200A
4 seconds (typical) for SST39LF/VF400A
8 seconds (typical) for SST39LF/VF800A
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
(typical values at 14 MHz)
– Active Current: 9 mA (typical)
– Standby Current: 3 µA (typical)
• Automatic Write Timing
– Internal V
PP
Generation
• End-of-Write Detection
– Toggle Bit
– Data# Polling
• Sector-Erase Capability
– Uniform 2 KWord sectors
• CMOS I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts and command sets
• Block-Erase Capability
– Uniform 32 KWord blocks
• Fast Read Access Time
– 55 ns for SST39LF200A/400A/800A
– 70 ns for SST39VF200A/400A/800A
• Packages Available
– 48-lead TSOP (12mm x 20mm)
– 48-ball TFBGA (6mm x 8mm)
– 48-ball WFBGA (4mm x 6mm)
– 48-bump XFLGA (4mm x 6mm) – 4 and 8Mbit
• Latched Address and Data
• All non-Pb (lead-free) devices are RoHS compliant
©2011 Silicon Storage Technology, Inc.
www.microchip.com
DS25001A
03/11
2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
A Microchip Technology Company
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
Product Description
The SST39LF200A/400A/800A and SST39VF200A/400A/800A devices are 128K x16 / 256K x16 /
512K x16 CMOS Multi-Purpose Flash (MPF) manufactured with SST proprietary, high-performance
CMOS SuperFlash technology. The split-gate cell design and thick oxide tunneling injector attain better
reliability and manufacturability compared with alternate approaches. The SST39LF200A/400A/800A
write (Program or Erase) with a 3.0-3.6V power supply. The SST39VF200A/400A/800A write (Program
or Erase) with a 2.7-3.6V power supply. These devices conform to JEDEC standard pinouts for x16
memories.
Featuring high-performance Word-Program, the SST39LF200A/400A/800A and SST39VF200A/400A/
800A devices provide a typical Word-Program time of 14 µsec. The devices use Toggle Bit or Data#
Polling to detect the completion of the Program or Erase operation. To protect against inadvertent
write, they have on-chip hardware and software data protection schemes. Designed, manufactured,
and tested for a wide spectrum of applications, these devices are offered with a guaranteed typical
endurance of 100,000 cycles. Data retention is rated at greater than 100 years.
The SST39LF200A/400A/800A and SST39VF200A/400A/800A devices are suited for applications that
require convenient and economical updating of program, configuration, or data memory. For all system
applications, they significantly improve performance and reliability, while lowering power consumption.
They inherently use less energy during Erase and Program than alternative flash technologies. When
programming a flash device, the total energy consumed is a function of the applied voltage, current,
and time of application. Since for any given voltage range, the SuperFlash technology uses less cur-
rent to program and has a shorter erase time, the total energy consumed during any Erase or Program
operation is less than alternative flash technologies. These devices also improve flexibility while lower-
ing the cost for program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Program times, independent of the number of
Erase/Program cycles that have occurred. Therefore the system software or hardware does not have
to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Pro-
gram times increase with accumulated Erase/Program cycles.
To meet surface mount requirements, the SST39LF200A/400A/800A and SST39VF200A/400A/800A
are offered in 48-lead TSOP packages and 48-ball TFBGA packages as well as Micro-Packages. See
Figures 2, 3, and 4 for pin assignments.
© 2011 Silicon Storage Technology, Inc.
DS25001A
03/11
2
2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
A Microchip Technology Company
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
Block Diagram
X-Decoder
SuperFlash
Memory
Memory Address
Address Buffer Latches
Y-Decoder
CE#
OE#
WE#
DQ
15
- DQ
0
1117 B1.2
Control Logic
I/O Buffers and Data Latches
Figure 1:
Functional Block Diagram
Pin Assignments
800A
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
NC
NC
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
400A
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
NC
NC
NC
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1
SST39LF/VF200A
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
NC
NC
NC
NC
NC
NC
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SST39LF/VF200A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
NC
VSS
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VDD
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
400A
A16
NC
VSS
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VDD
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
800A
A16
NC
VSS
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VDD
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
Standard Pinout
Top View
Die Up
1117 48-tsop P01.3
Figure 2:
Pin Assignments for 48-Lead TSOP
© 2011 Silicon Storage Technology, Inc.
DS25001A
03/11
3
2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
A Microchip Technology Company
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
TOP VIEW (balls facing down)
SST39LF/VF200A
6
5
4
3
2
1
A13 A12 A14
A9
A8
A10
NC
NC
A6
A2
A15 A16 NC DQ15 VSS
A11 DQ7 DQ14 DQ13 DQ6
NC DQ5 DQ12 VDD DQ4
1117 48-tfbga P02 2.0
WE# NC
NC
A7
A3
NC
NC
A4
NC DQ2 DQ10 DQ11 DQ3
A5
A1
DQ0 DQ8 DQ9 DQ1
A0 CE# OE# VSS
A
TOP VIEW (balls facing down)
B
C
D
E
F
G
H
TOP VIEW (balls facing down)
SST39LF/VF400A
SST39LF/VF800A
6
5
4
3
2
1
A13 A12 A14
A9
A8
A10
NC
NC
A6
A2
A15 A16 NC DQ15 VSS
A11 DQ7 DQ14 DQ13 DQ6
NC DQ5 DQ12 VDD DQ4
1117 48-tfbga P02 4.0
6
5
4
3
2
1
A13 A12 A14
A9
A8
A10
NC
A18
A6
A2
A15 A16 NC DQ15 VSS
A11 DQ7 DQ14 DQ13 DQ6
NC DQ5 DQ12 VDD DQ4
1117 48-tfbga P02 8.0
WE# NC
NC
A7
A3
NC
A17
A4
WE# NC
NC
A7
A3
NC
A17
A4
NC DQ2 DQ10 DQ11 DQ3
A5
A1
DQ0 DQ8 DQ9 DQ1
A0 CE# OE# VSS
NC DQ2 DQ10 DQ11 DQ3
A5
A1
DQ0 DQ8 DQ9 DQ1
A0 CE# OE# VSS
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
Figure 3:
Pin Assignments for 48-Ball TFBGA
© 2011 Silicon Storage Technology, Inc.
DS25001A
03/11
4
2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
A Microchip Technology Company
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
TOP VIEW (balls facing down)
SST39VF200A
6
A2
A4
A3
A5
A6
A7
NC
NC
NC
NC
NC
WE#
NC
NC
A9
A10
A8
A11
A13
A12
A14
A15
5
A1
4
A0
3
CE#
DQ8 DQ10
OE# DQ9
NC
NC
DQ4 DQ11 A16
DQ5 DQ6 DQ7
1117 48-xflga P03 2.0
2
V
SS
1
DQ0 DQ1 DQ2 DQ3
V
DD
DQ12 DQ13 DQ14 DQ15 V
SS
A
B
C
D
E
F
G
H
J
K
L
TOP VIEW (balls facing down)
SST39LF/VF400A
6
A2
A4
A3
A5
A6
A7
NC
A17
NC
NC
NC
WE#
NC
NC
A9
A10
A8
A11
A13
A12
A14
A15
5
A1
4
A0
3
CE#
DQ8 DQ10
OE# DQ9
NC
NC
DQ4 DQ11 A16
DQ5 DQ6 DQ7
1117 48-xflga P03 4.0
1117 48-xflga P03 8.0
2
V
SS
1
DQ0 DQ1 DQ2 DQ3
V
DD
DQ12 DQ13 DQ14 DQ15 V
SS
A
B
C
D
E
F
G
H
J
K
L
TOP VIEW (balls facing down)
SST39LF/VF800A
6
A2
A4
A3
A5
A6
A7
A18
A17
NC
NC
NC
WE#
NC
NC
A9
A10
A8
A11
A13
A12
A14
A15
5
A1
4
A0
3
CE#
DQ8 DQ10
OE# DQ9
NC
NC
DQ4 DQ11 A16
DQ5 DQ6 DQ7
2
V
SS
1
DQ0 DQ1 DQ2 DQ3
V
DD
DQ12 DQ13 DQ14 DQ15 V
SS
A
B
C
D
E
F
G
H
J
K
L
Figure 4:
Pin Assignments for 48-Ball WFBGA and 48-Bump XFLGA
© 2011 Silicon Storage Technology, Inc.
DS25001A
03/11
5
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