Filterless High Efficiency
Mono 3 W Class-D Audio Amplifier
SSM2311
FEATURES
Filterless Class-D amplifier with Σ-Δ modulation
No sync necessary when using multiple Analog Devices, Inc.,
Class-D amplifiers
3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply with
less than 10% total harmonic distortion (THD)
90% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Better than 98 dB signal-to-noise ratio (SNR)
Single-supply operation from 2.5 V to 5.5 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Available in 9-ball, 1.5 mm × 1.5 mm WLCSP
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 18 dB or user-adjustable gain setting
The SSM2311 features a high efficiency, low noise modulation
scheme that does not require any external LC output filters. The
modulation continues to provide high efficiency even at low output
power. It operates with 90% efficiency at 1.4 W into 8 Ω or 85%
efficiency at 3 W into 3 Ω from a 5.0 V supply and has an SNR that
is better than 98 dB. Spread-spectrum pulse density modulation
is used to provide lower EMI-radiated emissions compared with
other Class-D architectures.
The SSM2311 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
The device also includes pop-and-click suppression circuitry. This
minimizes voltage glitches at the output during turn-on and turn-
off, thus reducing audible noise on activation and deactivation.
The fully differential input of the SSM2311 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately V
DD
/2.
The default gain of SSM2311 is 18 dB, but users can reduce the gain
by using a pair of external resistors (see the Gain section).
The SSM2311 is specified over the industrial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mm
wafer level chip scale package (WLCSP).
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2311 is a fully integrated, high efficiency, Class-D audio
amplifier. It is designed to maximize performance for mobile
phone applications. The application circuit requires a minimum
of external components and operates from a single 2.5 V to 5.5 V
supply. It is capable of delivering 3 W of continuous output power
with less than 1% THD + N driving a 3 Ω load from a 5.0 V supply.
FUNCTIONAL BLOCK DIAGRAM
10µF
0.1µF
VBATT
2.5V TO 5.0V
VDD
OUT+
MODULATOR
37.5kΩ
300kΩ
SHUTDOWN
300kΩ
(37.5kΩ + R
EXT
)
1
INPUT
SSM2311
AUDIO IN+
AUDIO IN–
22nF
1
R
EXT
IN+
IN–
22nF
1
R
EXT
37.5kΩ
300kΩ
FET
DRIVER
OUT–
SD
BIAS
OSCILLATOR
GND
POP-AND-CLICK
SUPPRESSION
GAIN =
CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY V
DD
/2.
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
06161-001
SSM2311
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Typical Application Circuits ......................................................... 13
Application Notes ........................................................................... 15
Overview ..................................................................................... 15
Gain.............................................................................................. 15
Pop-and-Click Suppression ...................................................... 15
Layout .......................................................................................... 15
Input Capacitor Selection.......................................................... 16
Proper Power Supply Decoupling ............................................ 16
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
1/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
SSM2311
SPECIFICATIONS
V
DD
= 5.0 V, T
A
= 25
o
C, R
L
= 8 Ω, unless otherwise noted.
Table 1.
Parameter
DEVICE CHARACTERISTICS
Output Power
Symbol
P
O
Conditions
R
L
= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V
DD
= 5.0 V
R
L
= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V
DD
= 3.6 V
R
L
= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V
DD
= 5.0 V
R
L
= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V
DD
= 3.6 V
R
L
= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V
DD
= 5.0 V
R
L
= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V
DD
= 3.6 V
R
L
= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V
DD
= 5.0 V
R
L
= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V
DD
= 3.6 V
R
L
= 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V
DD
= 5.0 V
R
L
= 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V
DD
= 3.6 V
R
L
= 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V
DD
= 5.0 V
R
L
= 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V
DD
= 3.6 V
P
OUT
= 1.4 W, 8 Ω, V
DD
= 5.0 V
P
O
= 3 W into 3 Ω, f = 1 kHz, V
DD
= 5.0 V
P
O
= 1 W into 8 Ω, f = 1 kHz, V
DD
= 5.0 V
1.0
V
CM
= 2.5 V ± 100 mV at 217 Hz input referred
G = 18 dB
Guaranteed from PSRR test
V
DD
= 2.5 V to 5.0 V, dc input floating/ground
V
RIPPLE
= 100 mV at 217 Hz, inputs ac GND,
C
IN
= 0.1 μF
V
IN
= 0 V, no load, V
DD
= 5.0 V
V
IN
= 0 V, no load, V
DD
= 3.6 V
V
IN
= 0 V, no load, V
DD
= 2.5 V
SD = GND
2.5
70
60
800
2.0
Min
Typ
1.2
0.615
1.53
0.77
2
1.4
2.3
1.6
3
1.8
3.3
2.5
89
0.5
0.2
V
DD
− 1.0
Max
Unit
W
W
W
W
W
W
W
W
W
W
W
W
%
%
%
V
dB
kHz
mV
V
dB
dB
mA
mA
mA
nA
dB
kΩ
V
V
ms
μs
kΩ
μV
dB
Efficiency
Total Harmonic Distortion + Noise
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Average Switching Frequency
Differential Output Offset Voltage
POWER SUPPLY
Supply Voltage Range
Power Supply Rejection Ratio
η
THD + N
V
CM
CMRR
GSM
f
SW
V
OOS
V
DD
PSRR
PSRR
GSM
I
SY
12.0
5.0
85
60
5.5
4.5
4.0
20
18
37.5
1.2
0.5
30
5
>100
35
98
Supply Current
Shutdown Current
GAIN CONTROL
Closed-Loop Gain
Differential Input Impedance
SHUTDOWN CONTROL
Input Voltage High
Input Voltage Low
Turn-On Time
Turn-Off Time
Output Impedance
NOISE PERFORMANCE
Output Voltage Noise
Signal-to-Noise Ratio
I
SD
Av
Z
IN
V
IH
V
IL
t
WU
t
SD
Z
OUT
e
n
SNR
SD = VDD
I
SY
≥ 1 mA
I
SY
≤ 300 nA
SD rising edge from GND to V
DD
SD falling edge from V
DD
to GND
SD = GND
V
DD
= 3.6 V, f = 20 Hz to 20 kHz, inputs are
ac grounded, A
V
= 18 dB, A weighting
P
OUT
= 1.4 W, R
L
= 8 Ω
Rev. 0 | Page 3 of 20
SSM2311
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 2.
Parameter
Supply Voltage
Input Voltage
Common-Mode Input Voltage
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Rating
6V
V
DD
V
DD
−65°C to +150°C
−40°C to +85°C
−65°C to +165°C
300°C
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
9-Ball, 1.5 mm × 1.5 mm WLCSP
PCB
1S0P
1
2S0P
1
θ
JA
162
76
θ
JB
38.5
21
Unit
°C/W
°C/W
1
Referencing the JEDEC thermal standard.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 4 of 20
SSM2311
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL A1
CORNER
1
A
2
3
B
C
SSM2311
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
06161-002
Figure 2. SSM2311 WLCSP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
2C
1A
1C
3C
1B
2A, 3B
3A
2B
Mnemonic
SD
IN+
IN−
OUT−
VDD
GND
OUT+
PVDD
Description
Shutdown Input. Active low digital input.
Noninverting Input.
Inverting Input.
Inverting Output.
Power Supply.
Ground.
Noninverting Output.
Power Supply.
Rev. 0 | Page 5 of 20
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