Memory ICs
4,096-Bit Serial Electrically Erasable PROM
BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV
•
Features CMOS Technology
• Low power
• 256
×
16 bit configuration
• 2.7V to 5.5V operation
• Low power dissipation
– 3mA (max.) active current: 5V
– 5µA (max.) standby current: 5V
• Auto increment for efficient data bump
• Automatic erase-before-write
• Hardware and software write protection
– Default to write-disable state at power up
– Software instructions for write-enable / disable
– Vcc lockout inadvertent write protection
• 8-pin SOP / 8-pin SSOP-B / 8-pin DIP packages
• Device status signal during write cycle
• TTL compatible Input / Output
• 100,000 ERASE / write cycles
• 10 years Data Retention
•
Pin assignments
CS
SK
DI
1
2
3
8
7
6
5
V
CC
N.C.
N.C.
GND
NC 1
V
CC
2
CS 3
SK
4
8
7
N.C.
GND
DO
DI
BR93LC66 /
BR93LC66RF
BR93LC66F /
BR93LC66FV
6
5
DO 4
•
Pin descriptions
Pin
Name
CS
SK
DI
DO
GND
N.C.
N.C.
V
CC
Chip select input
Serial clock input
Start bit, operating code, address, and serial
data input
Serial data output, READY / BUSY internal
status display output
Ground
Not connected
Not connected
Power supply
Function
•
Overview series are CMOS serial input / output-type memory circuits (EEPROMs) that can be programmed
The BR93LC66
electrically. Each is configured of 256 words
×
16 bits (4096 bits), and each word can be accessed individually and
data read from it and written to it.
Operation control is performed using five types of commands. The commands, addresses, and data are input
through the DI pin under the control of the CS and SK pins. In a write operation, the internal status signal (READY or
BUSY) can be output from the DO pin.
1
Memory ICs
BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV
•
Block diagram
Power supply
CS
Command code
voltage detector
Control
High voltage
Write disable
generator
SK
Clock generation
Address
Command
Address
8bit
buffer
decoder
DI
8bit
4096bit
register
Data
R/W
EEPROM array
16bit
16bit
register
amplifier
DO
Dummy bit
•
Absolute maximum ratings (Ta = 25°C)
Parameter
Applied voltage
BR93LC66
Power
dissipation BR93LC66F / RF
BR93LC66FV
Storage temperature
Operating temperature
Terminal voltage
Pd
Symbol
V
CC
Limits
– 0.3 ~ + 6.5
500
∗
1
350
∗
2
300
∗
3
Tstg
Topr
—
– 65 ~ + 125
– 40 ~ + 85
– 0.3 ~ V
CC
+ 0.3
°C
°C
V
mW
Unit
V
∗
1 Reduced by 5.0mW for each increase in Ta of 1°C over 25°C.
∗
2 Reduced by 3.5mW for each increase in Ta of 1°C over 25°C.
∗
3 Reduced by 3.0mW for each increase in Ta of 1°C over 25°C.
•
Recommended operating conditions (Ta = 25°C)
Parameter
Power supply
voltage
Input voltage
Writing
Reading
Symbol
V
CC
V
IN
Min.
2.7
2.0
0
Typ.
—
—
—
Max.
5.5
5.5
V
CC
Unit
V
V
V
2
Memory ICs
BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV
CC
•
Electrical characteristics (unless otherwise noted, Ta = – 40 to 85°C, V
Parameter
Input low level voltage
Input high level voltage
Output low level voltage 1
Output high level voltage 1
Output low level voltage 2
Output high level voltage 2
Input leakage current
Output leakage current
Operating current
dissipation 1
Operating current
dissipation 2
Standby current
Symbol
V
IL
V
IH
V
OL1
V
OH1
V
OL2
V
OH2
I
LI
I
LO
I
CC1
I
CC2
I
SB
Min.
– 0.3
2.0
—
2.4
—
Typ.
—
Max.
0.8
Unit
V
V
V
V
V
V
µA
µA
mA
mA
µA
— V
CC
+ 0.3
—
—
—
0.4
—
0.2
—
1.0
1.0
3
1.5
5
= 5V ± 10%)
Conditions
—
—
I
OL
= 2.1mA
I
OH
= – 0.4mA
I
OL
= 10µA
I
OH
= – 10µA
V
IN
= 0V ~ V
CC
V
OUT
= 0V ~ V
CC
, CS = GND
V
IN
= V
IH
/ V
IL
, DO = OPEN, fsk = 1MHz, WRITE
V
IN
= V
IH
/ V
IL
, DO = OPEN, fsk = 1MHz, READ
CS = SK = DI = GND, DO = OPEN
V
CC
– 0.4 —
– 1.0
– 1.0
—
—
—
—
—
1.5
0.7
1.0
(unless otherwise noted, Ta = – 40 to 85°C, V
CC
= 3V ± 10%)
Parameter
Input low level voltage
Input high level voltage
Output low level voltage
Output high level voltage
Input leakage current
Output leakage current
Operating current
dissipation 1
Operating current
dissipation 2
Standby current
Symbol
V
IL
V
IH
V
OL
V
OH
I
LI
I
LO
I
CC1
I
CC2
I
SB
Min.
– 0.3
Typ.
Max.
Unit
V
V
V
V
I
OL
= 10µA
I
OH
= – 10µA
Conditions
—
—
— 0.15
×
V
CC
V
CC
+ 0.3
0.2
—
1.0
1.0
2
1
3
0.7
×
V
CC
—
—
—
V
CC
– 0.4 —
– 1.0
– 1.0
—
—
—
—
—
0.5
0.2
0.4
µA
V
IN
= 0V ~ V
CC
µA
V
OUT
= 0V ~ V
CC
, CS = GND
mA V
IN
= V
IH
/ V
IL
, DO = OPEN, fsk = 250kHz, WRITE
mA V
IN
= V
IH
/ V
IL
, DO = OPEN, fsk = 250kHz, READ
µA
CS = SK = DI = GND, DO = OPEN
•
Electrical characteristics (unless otherwise noted, Ta = – 40 to 85°C, V
Parameter
Input low level voltage
Input high level voltage
Output low level voltage
Output high level voltage
Input leakage current
Output leakage current
Operating current
dissipation 2
Standby current
Symbol
V
IL
V
IH
V
OL
V
OH
I
LI
I
LO
I
CC2
I
SB
Min.
– 0.3
Typ.
Max.
Unit
V
V
V
V
µA
µA
mA
µA
— 0.15
×
V
CC
0.7
×
V
CC
— V
CC
+ 0.3
—
—
0.2
—
1.0
1.0
1
3
CC
= 2.0V)
Conditions
—
—
I
OL
= 10µA
I
OH
= – 10µA
V
IN
= 0V ~ V
CC
V
OUT
= 0V ~ V
CC
, CS = 0V
V
IN
= V
IH
/ V
IL
, DO = OPEN, fsk = 200kHz,
READ
CS = SK = DI = 0V, DO = OPEN
V
CC
– 0.4 —
– 1.0
– 1.0
—
—
—
—
0.2
0.4
3
Memory ICs
BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV
•
Circuit operation
(1) Command mode
With these ICs, commands are not
Start Operating
Address
Data
Command
code
bit
recognized or acted upon until the
start bit is received. The start bit is
1
10
A7 ~ A0
—
Read (READ)
∗
1
taken as the first “1” that is received
1
00
11XXXXXX
—
Write Enabled (WEN)
after the CS pin rises.
1
01
A7 ~ A0
D15 ~ D0
Write (WRITE)
∗
2
∗1
After setting of the read command
1
00
01XXXXXX D15 ~ D0
Write to All Addresses (WRAL)
∗
2
and input of the SK clock, data corre-
1
00
00XXXXXX
—
Write Disabled (WDS)
sponding to the specified address is
1
11
A7 ~ A0
—
output, with data corresponding to up-
Erase (ERASE)
∗
3
per addresses then output in se-
1
00
10XXXXXX
—
Chip Erase (ERAL)
∗
3
quence. (Auto increment function)
X: Either V
IH
or V
IL
∗2
When the write or write all address-
es command is executed, all data in the selected memory cell is erased automatically, and the input data is written to
the cell.
∗3
These modes are optional modes. Please contact Rohm for information on operation timing.
(2) Operation timing characteristics
(unless otherwise noted, Ta = – 40 to 85°C, V
CC
= 5V ± 10%)
Parameter
SK clock frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output confirmation
Time from CS to output High impedance
Write cycle time
Symbol
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DIS
t
CSH
t
DIH
t
PD1
t
PD0
t
SV
t
DF
t
E / W
Min.
—
450
450
450
50
100
0
100
—
—
—
—
—
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
1
—
—
—
—
—
—
—
500
500
500
100
10
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
4
Memory ICs
BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV
For low voltage operation (unless otherwise noted, Ta = – 40 to 85°C, V
CC
= 3V ± 10%)
Parameter
SK clock frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output confirmation
Time from CS to output High impedance
Write cycle time
Symbol
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DIS
t
CSH
t
DIH
t
PD1
t
PD0
t
SV
t
DF
t
E / W
Min.
—
1
1
1
200
400
0
400
—
—
—
—
—
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
250
—
—
—
—
—
—
—
2
2
2
400
25
Unit
kHz
µs
µs
µs
ns
ns
ns
ns
µs
µs
µs
ns
ms
When reading at low voltage (Unless otherwise noted, Ta = – 40 to 85°C, V
CC
= 2.0V)
Parameter
SK clock frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output High impedance
Not designed for radiation resistance.
Symbol
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DIS
t
CSH
t
DIH
t
PD1
t
PD0
t
DF
Min.
—
2
2
2
400
800
0
800
—
—
—
Typ.
—
—
—
—
—
—
—
—
—
—
—
Max.
200
—
—
—
—
—
—
—
4
4
800
Unit
kHz
µs
µs
µs
ns
ns
ns
ns
µs
µs
ns
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
