DATA SHEET
R-IN32M3 Series
LSI for Industrial Ethernet
1.
1.1
R18DS0008EJ0204
Dec 25, 2014
Overview
Introduction
Ethernet communication continues to spread rapidly in the field of industrial automation as manufacturers seek to
improve the capability, efficiency, and flexibility of their organizations. Modern Industrial Ethernet applications require
high-speed real-time response, low power consumption, and high performance. These requirements are not necessarily
met by traditional methods such as hard-wired Ethernet processors or dedicated high-speed CPUs.
Renesas' R-IN32M3 series of large-scale integrated circuits (LSI) are specifically tailored to meet the demands of
Industrial Ethernet applications. Key features include:
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•
•
•
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High-speed, real-time, deterministic, low-latency, low-jitter response for real-time applications
Low power consumption
Integrated ARM Cortex-M3 core for flexibility
Integrated Real-Time OS Accelerator with support for μITRON version 4.0
Integrated Gigabit Ethernet MAC (R-IN32M3-CL only)
Integrated 10/100Mbps EtherPHY (R-IN32M3-EC only)
Dedicated, DMA controller and buffer for the network processor
High performance with low CPU usage by offloading functions to Real-Time OS Accelerator
Multiple timers, serial interfaces, general purpose I/O (GPIO), external memory interfaces
1.2
Product Lineup
Renesas’s R-IN32M3 series includes the following two devices:
Table1.1
R-IN32M3 Product Lineup
Product name
R-IN32M3-EC
R-IN32M3-CL
R-IN32M3 with built-in EtherCAT
Feature
TM
Slave Controller
TM
R-IN32M3 with built-in CC-Link IE Field
(Intelligent device station)
R18DS0008EJ0204
Dec 25, 2014
Page 1 of 100
R-IN32M3 Series Data Sheet
1.
Overview
1.3
Table1.2
Overview
Overview of R-IN32M3 (1/2)
Product
R-IN32M3
ARM Cortex-M3 32-bit RISC CPU
+ Real-Time OS Accelerator (Hardware Real-Time OS, HW-RTOS)
100MHz
Thumb
Ⓡ
-2 instruction ARMv7-M architecture
768KByte (RAM w/ECC)
512KByte (RAM w/ECC)
64KByte (RAM w/ECC)
- 32-bit system bus at 100MHz
- 128-bit communication bus at 100MHz
- 4 channels + 1 channel (for Real-time port)
- Supports software and/or various interrupt-triggered DMA
- Serial Flash ROM Boot
- External Memory Boot
- External MPU Boot
Item
CPU cores
Operating frequency
Instruction set
Instruction RAM
Data RAM
Buffer RAM
Internal System Bus
DMA
Boot options
External Memory Support
- 16-bit or 32-bit bus interface
- Page ROM / ROM / SRAM interface
- Synchronous burst memory interface
- Four chip selects for external SRAM
- 256MByte (max) external memory space
- Programmable wait function
External MPU interface
- 16-bit or 32-bit bus interface
- General-purpose interface for static memory
- Address space:2MByte (Instruction RAM, Data RAM, Register area)
Serial Flash ROM Memory Controller - Support serial interface compatible with SPI of the companies
- Support direct boot from serial memory device
- Support Fast Read, Fast Read Dual Output, Fast Read Dual I/O mode
- Direct layout in memory space
Interrupt Support
Internal Peripherals
I/O Ports
System Timers
- 96 CMOS I/O ports (max)
- Hardware RTOS interal timer
- CPU internal timer
- 4 channels timer array
- 32-bit counter & 32-bit data register
- counter by external signal
Watchdog Timer
- 1 channel
- Software-triggered start mode
- Watchdog error response options:
- Generate Non-Maskable Interrupt (NMI)
- Generate Reset
- 29 external interrupt ports
R18DS0008EJ0204
Dec 25, 2014
Page 2 of 100
R-IN32M3 Series Data Sheet
1.
Overview
Table1.2 Overview of R-IN32M3 (2/2)
Product
Item
Internal Peripherals (cont.)
Asynchronous serial interface
- 2 channels
- Full duplex
- FIFOs: 10-bit x 16 receive and 8-bit x 16 transmit
- Support output of receive errors and status
- Character length: 7 or 8-bit
- Parity bit options: odd, even, 0- , none
- Transmit stop bits: 1 or 2-bit
I2C Serial interface
- 2 channels
- Operation modes: normal or high-speed
- Transfer modes: single-transfer mode, or continuous-transfer mode
- Transmission data length: 8-bit
CAN controller
- 2 channels
- Conforming to ISO11898
- Support to transfer and receive normal frame and expand frame
- Transmission speed: 1Mbps (max)
Clock Synchronized Serial
Interface
- 2 channels
- Synchronized Serial data transmission by three-wire system
- Selectable Master mode or Slave mode
- Built-in Baud-rate generator
- Transmission data length: 7bit - 16bit
CC-Link
10/100/1000Mbps Ether MAC
Note1
R-IN32M3
- Intelligent device station
- Remote device station
- 1 channel
- Built-in 2-port switch
- GMII / MII interface
Note3
<R>
10/100Mbps EtherPHY
CC-Link IE
EtherCAT
Note1
Note2
- 2ports
- Support for 10BaseT and 100BaseTX/FX
CC-Link IE Field (Intelligent device station)
EtherCAT Slave controller
- Select serial wire or JTAG
- Support Full Trace (Built-in ETM)
Generates various clocks from 25MHz input clock
I/O:VDD33 = 3.3±0.3V
Internal circuit :VDD10 = 1.0±0.1V
Note2
On-chip debug function
Internal PLL
Power supply voltage
Note1. Supported by R-IN32M3-CL
Note2. Supported by R-IN32M3-EC
Note3. Please ask us about a detail for support.
R18DS0008EJ0204
Dec 25, 2014
Page 3 of 100
1.4
1.4.1
R18DS0008EJ0204
Dec 25, 2014
Buffer ID
Header
Endec
M
M
Buffer RAM
64KB(ECC)
S
Buffer
Allocator
INT_DMA
M
M
MAC_DMA
Gigabit
Ether
128bit Communication Bus
R-IN32M3-EC
128bit Hardware Function Bus
Hardware
Function
Control
R-IN32M3 Series Data Sheet
Cortex-M3
CPU
Debug
M
Data RAM
512KB(ECC)
AHB2DMA
PHY
EtherCAT
Ether
SWITCH
MAC_TOP
PHY
Internal Block Diagram
NVIC
M M M
Hardware
Real-Time
OS
Bridge
OS
S
R-IN32M3-EC Block Diagram
S
S
S
MUX
S S
MUX
S
S
S
MUX
S S
CPU System
CPU System
CPU D-Code
CPU I-Code
DMAC
DMAC_RTPORT
HOST_CPU
CPU D-Code
CPU I-Code
DMAC
DMAC_RTPORT
HOST_CPU
S
S
S
S
S S
MUX
S
S
S
S S
MUX
S S
MUX
S S
MUX
S
S
S S
MUX
S S
S S
MUX
S
S
S S
MUX
S
M
Real-Time
GPIO
MEMC
Instruction
RAM
768KB(ECC)
S
M
S
DMAC
_RTPORT
DMAC
Serial Flash
ROM
MEMC
GPIO
M
Ext_
Micon
Interface
AHB_APB
Bridge
Bridge
CC-Link
APB
Selector
UART × 2ch
CAN × 2ch
Timer Array
CSI × 2ch
WDT
I2C × 2ch
Page 4 of 100
1.
Overview
1.4.2
R18DS0008EJ0204
Dec 25, 2014
128bit Hardware Function Bus
Buffer ID
Hardware
Function
Control
Buffer RAM
64KB(ECC)
S
Buffer
Allocator
INT_DMA
M
M
MAC_DMA
Gigabit
Ether
Header
Endec
M
M
128bit Communication Bus
M
Data RAM
512KB(ECC)
AHB2DMA
Ether
SWITCH
PHY
PHY
MAC_TOP
CC-Link IE
Field Network
Hardware
Real-Time
OS
Bridge
OS
S
R-IN32M3-CL
R-IN32M3 Series Data Sheet
Cortex-M3
CPU
Debug
NVIC
M M M
R-IN32M3-CL Block Diagram
S
S
MUX
S S
S
MUX
S
S
S
MUX
S S
CPU System
CPU System
CPU D-Code
CPU I-Code
DMAC
DMAC_RTPORT
HOST_CPU
CPU D-Code
CPU I-Code
DMAC
DMAC_RTPORT
HOST_CPU
S
S
S S
MUX
S
S S
MUX
S S
MUX
S
S
S
S S
MUX
S
S
S S
MUX
S S
S
S S
MUX
S
S
S S
MUX
S
M
Real-Time
GPIO
MEMC
Instruction
RAM
768KB(ECC)
S
M
S
DMAC
_RTPORT
DMAC
Serial Flash
ROM
MEMC
GPIO
M
Ext_
Micon
Interface
AHB_APB
Bridge
Bridge
CC-Link
APB
Selector
UART × 2ch
CAN × 2ch
Timer Array
CSI × 2ch
WDT
I2C × 2ch
Page 5 of 100
1.
Overview
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