High Speed ADC USB FIFO Evaluation Kit
HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC
FEATURES
Buffer memory board for capturing digital data
Used with high speed ADC evaluation boards
32 kB FIFO Depth at 133 MSPS (upgradeable to 256 kB)
Simplifies evaluation of high speed ADCs
Measures performance with ADC Analyzer™
Real-time FFT and time domain analysis
Analyze SNR, SINAD, SFDR, and harmonics
Import raw text data for analysis
Virtual ADC eval board support using ADIsimADC™
Simple USB port interface
Compatible with Windows® 98 (2
nd
Ed), Windows 2000,
Windows Me, or Windows XP
FUNCTIONAL BLOCK DIAGRAM
ADC ANALYZER
TM
USB CABLE
EQUIPMENT NEEDED
3.3 V power supply
Analog signal source and anti-aliasing filter
Low jitter clock source
High speed ADC evaluation board and ADC data sheet
PC running Windows 98 (2
nd
Ed), Windows 2000,
Windows Me, or Windows XP
USB 2.0 port recommended (USB 1.1 compatible)
Available ADIsimADC product model files
SINGLE OR DUAL
HIGH SPEED ADC
EVALUATION BOARD
POWER
SUPPLY
LOGIC
ADC
FILTERED
ANALOG
INPUT
CLOCK
CIRCUIT
n
HSC-ADC-EVALA-SC
OR
HSC-ADC-EVALA-DC
3.3V
FIFO2
32K
FIFO1
32K
04750-0-001
TIMING
CIRCUIT
CLOCK INPUT
80-PIN CONNECTOR
PRODUCT DESCRIPTION
The high speed ADC FIFO evaluation kit includes the latest
version of ADC Analyzer and a memory board to capture
blocks of digital data from Analog Devices’ high speed analog-
to-digital converter (ADC) evaluation boards. This FIFO board
can be connected to a PC through a USB port and used with
ADC Analyzer to evaluate the performance of high speed ADCs
quickly. Users can view an FFT for a specific analog input and
encode rate and analyze SNR, SINAD, SFDR, and harmonic
information.
The evaluation kit is easy to set up. Additional equipment
needed includes an Analog Devices’ high speed ADC evaluation
board, a power supply, a signal source, and a clock source. Once
the kit is connected and powered, the evaluation is enabled
instantly on the PC.
Two versions of the FIFO are available. The HSC-ADC-EVALA-
DC is used with dual ADCs and converters with demultiplexed
digital outputs. The HSC-ADC-EVALA-SC evaluation board is
used with single-channel ADCs. See Table 1, to choose the FIFO
appropriate for your high speed ADC evaluation board.
Figure 1. Functional Block Diagram (Simplified)
PRODUCT HIGHLIGHTS
1.
Easy to set up—Connect
the power supplies and signal
sources to the two evaluation boards. Then connect to the
PC and evaluate the performance instantly.
ADIsimADC
– The software supports virtual ADC
evaluation using ADI proprietary behavioral modeling
technology. This allows rapid comparison between multiple
ADCs, with or without hardware evaluation boards.
USB Port Connection to PC—PC
interface is a USB 2.0
connection (1.1 compatible) to PC. A USB cable is
provided in the kit.
32 kB FIFO(s)—This
FIFO(s) stores data from the ADC(s)
for processing. A pin compatible FIFO family is used for
easy upgrading.
Up to 133 MSPS encode rate on each channel—Single-
channel ADCs with encode rates up to 133 MSPS can be
used with the FIFO board. Dual and demultiplexed output
ADCs also can be used with the FIFO board (with clock
rates up to 133 MSPS on each output channel).
2.
3.
4.
5.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC
TABLE OF CONTENTS
FIFO Evaluation Board Quick Start............................................... 4
Requirements ................................................................................ 4
Quick Start Steps ...................................................................... 4
Virtual Evaluation Board Quick Start With ADIsimADC.......... 5
Requirements ................................................................................ 5
Quick Start Steps ...................................................................... 5
FIFO 4 Data Capture Board ............................................................ 6
FIFO 4 Supported ADC Evaluation Boards.............................. 6
Terminology ...................................................................................... 8
Single Tone FFT............................................................................ 8
Two-Tone FFT .............................................................................. 9
Theory of Operation ...................................................................... 10
Clocking Description................................................................. 10
Clocking with Interleaved Data................................................ 10
Installing ADC Analyzer................................................................ 11
Installation................................................................................... 11
Configuration File ...................................................................... 11
Configuring an Evaluation Board ............................................ 11
Additional Configuration Options .......................................... 14
Windowing.............................................................................. 14
Power Supply........................................................................... 14
Y-Axis....................................................................................... 14
Installing ADC Analyzer With ADIsimADC.............................. 15
Installation................................................................................... 15
Configuration File ...................................................................... 15
Configuring a Model.................................................................. 15
ADC Analyzer Functions .............................................................. 17
Time Domain.............................................................................. 17
Continuous Time Domain ........................................................ 17
FFT ............................................................................................... 17
Continuous FFT ......................................................................... 17
Average FFT ................................................................................ 17
Continuous Average FFT .......................................................... 17
Two Tone ..................................................................................... 18
Continuous Two Tone ............................................................... 18
Average Two Tone ...................................................................... 18
Stop............................................................................................... 18
Zooming and Exporting Data .................................................. 18
Importing Data ........................................................................... 19
.csv and ASCII files ................................................................ 19
Printing ........................................................................................ 20
Saving Files.................................................................................. 21
Additional Functions (Virtual ADC only).............................. 21
Amplitude Sweep (Virtual ADC only) .................................... 21
Analog Frequency Sweep (Virtual ADC only)....................... 22
Troubleshooting.............................................................................. 23
Flat Line Signal Displayed......................................................... 23
Displayed Signal Unlike Analog Input .................................... 23
FFT Noise Floor Higher Than Expected................................. 24
Large Spur In FFT (Image Problem) ....................................... 24
MSBs Missing From Time Domain ......................................... 25
Upgrading FIFO Memory......................................................... 25
Jumpers ............................................................................................ 26
Default Settings........................................................................... 26
FIFO Schematices and PCB Layout ............................................. 28
FIFO Connector ......................................................................... 28
PCB Schematic............................................................................ 29
Assembly—Primary Side........................................................... 35
Assembly—Secondary Side....................................................... 36
Layer 1— Primary Side.............................................................. 37
Layer 2—Ground Plane ............................................................. 38
Layer 3—Power Plane................................................................ 39
Rev. 0 | Page 2 of 44
HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC
Layer 4—Secondary Side............................................................40
ESD Caution ................................................................................40
Bill of Materials................................................................................41
Appendix: Sampling and FFT Fundamentals..............................43
Coherent Sampling .....................................................................43
Windowing Functions................................................................43
FFT Calculations.........................................................................43
Ordering Guide ...........................................................................44
REVISION HISTORY
5/04—Revision 0: Initial Version
Rev. 0 | Page 3 of 44
HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC
FIFO EVALUATION BOARD QUICK START
Install ADC Analyzer from the CD provided in the FIFO
evaluation kit. See the Installing ADC Analyzer section for more
details. For the latest updates to the software, check the Analog
Devices website at
www.analog.com/hsc-FIFO.
5.
Once the cable is connected to both the computer and
FIFO and power is supplied, the USB drivers start to install.
To complete the total installation of the FIFO drivers, you
need to complete the new hardware sequence two times.
The first Found New Hardware Wizard opens with the text
message
This wizard helps you install software for…Pre-
FIFO 4.
Click the recommended install, and go to the next
screen. A Hardware Installation warning window should
then be displayed. Click
Continue Anyway.
The next
window that opens should finish the Pre-FIFO 4
installation. Click
Finish
to complete. Your computer
should go through a second Found New Hardware Wizard,
and the text message,
This wizard helps you install
software for…Analog Devices FIFO 4,
should be
displayed Continue as you did in the previous installation
and click
Continue Anyway,
then click
Finish
on the next
two windows. This should complete the installation.
(Optional) Verify in the device manager that “Analog
Devices, FIFO4” is listed under the USB hardware.
Apply power to the evaluation board and check the voltage
levels at the board level.
Connect the appropriate analog input (which should be
filtered with a band-pass filter) and low jitter clock signal.
Make sure the evaluation boards are powered before
connecting the analog input and clock.
Start ADC Analyzer (see the Installation section for
installing the software).
REQUIREMENTS
Requirements include
•
•
•
•
•
•
•
•
FIFO evaluation board, ADC Analyzer, and USB cable
High speed ADC evaluation board and ADC data sheet
3.3 V power supply for FIFO evaluation board
Power supply for ADC evaluation board
Analog signal source and appropriate filtering
Low jitter clock source applicable for specific ADC
evaluation, typically < 1 ps rms
PC running Windows 98 (2nd Ed), Windows 2000,
Windows Me, or Windows XP
PC with a USB 2.0 port recommended (USB 1.1
compatible)
6.
7.
Quick Start Steps
1.
Connect the FIFO evaluation board to the ADC evaluation
board. If an adapter is required, insert the adapter between
the ADC evaluation board and the FIFO board. If using the
HSC-ADC-EVALA-SC model, connect the evaluation
board to the bottom half of the 80-pin connector (closest
to the installed IDT FIFO chip).
Connect the provided USB cable to the FIFO evaluation
board and to an available USB port on the computer.
Refer to Table 4 for any jumper changes. Most evaluation
boards can be used with the default settings.
After verification, connect the appropriate power supplies
to the FIFO and ADC evaluation boards. The FIFO
evaluation board requires a single 3.3 V power supply with
1 A current capability. Refer to the instructions included in
the ADC data sheet for more information about the ADC
evaluation board setup.
8.
9.
2.
3.
4.
10. Choose a configuration file for the ADC evaluation board
used or create one (see the Configuring an Evaluation
Board section for more information).
11. Click
Time Domain
(left-most button under the pull-
down menus). A reconstruction of the analog input is
displayed. If the expected signal does not appear, or if there
is only a flat red line, refer to the Troubleshooting section
for more information.
Rev. 0 | Page 4 of 44
HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC
VIRTUAL EVALUATION BOARD QUICK START WITH ADIsimADC
REQUIREMENTS
Requirements include
•
•
Completed installation of ADC Analyzer version 4.5.0 or
later.
ADIsimADC product model files for the desired converter.
Models are not installed with the software, but may be
downloaded from the website at no charge. Go to
www.analog.com/ADIsimADC
or look under
Design
Tools
for the product of interest.
No hardware is required. However, if you wish to compare
results of a real evaluation board and the model, you may
switch easily between the two, as outlined below.
5.
On the ADC Modeling form, select the
Device
tab and
click the
…
button, adjacent to the dialog box. This opens a
file browser and displays all of the models found in the
default directory: c:\program files\adc_analyzer\models. If
no model files are found, follow the on-screen directions or
see Step 1 to install available models. If you have saved the
models somewhere other than the default location, use the
browser to navigate to that location and select the file of
interest.
From the menu choose Config > FFT. In the FFT
Configuration form, ensure that the
Encode Frequency
is
set for a valid rate for the simulated device under test. If set
too low or too high, the model will not run.
Once a model has been selected, information about the
model displays on the
Device
tab. After ensuring that you
have selected the right model, select the
Input
tab. This lets
you configure the input to the model. From the drop down
menu, select either
Sine Wave
or
Two Tone
for the input
signal.
Click
Time Domain
(left-most button under the pull-
down menus). A reconstruction of the analog input is
displayed. The model may now be used just as a standard
evaluation board would be.
The model supports additional features not found when
testing a standard evaluation board. When using the
modeling capabilities, it is possible to sweep either the
analog amplitude or the analog frequency. See the
Installing ADC Analyzer With ADISIMADC section for
additional features.
•
6.
Quick Start Steps
1.
To obtain ADC model files, go to
www.analog.com/ADIsimADC
or look under
Design
Tools
for the product of interest. Download the files of
interest to a local drive. The default location is c:\program
files\adc_analyzer\models.
Start ADC Analyzer (see the Installation section for
installing the software).
From the menu choose Config > Buffer and select
Model
from the drop down menu as the buffer memory. In effect,
the model functions in place of the ADC and data capture
hardware.
After selecting the Model, a small button,
Model,
is
displayed next to the
Stop
button. Click
Model
to select
and configure which converter will be modeled. This places
a small form in the workspace where you can select and
configure how the model will behave.
7.
2.
3.
8.
9.
4.
Rev. 0 | Page 5 of 44
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