AN4391
Application note
New P-channel trench technology from ST for low power DC-DC
conversions and load switching applications
Delfo Fusillo, Filippo Scrimizzi
Introduction
P-channel and N-channel MOSFETs show a different electrical performance. Due to lower
hole mobility (three times smaller than electrons), the magnitude of specific on-resistance is
greater in the P-channel structure. A larger die-size is needed to reach the same R
DS(on)
performance. However, an important advantage of P-channel devices is the simplicity and
the driving circuitry optimization. In this document, new STripFET VI DeepGATE trench P-
channel technology is deeply analyzed, from a technological point of view and in some of
most popular applications for P-channel FETs, such as: low power DC-DC conversions
(buck, boost) and load switches.
November 2013
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www.st.com
Contents
AN4391
Contents
1
2
3
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
P-channel technology overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
P-channel FETs in low power DC-DC converters . . . . . . . . . . . . . . . . . . 6
3.1
3.2
3.3
12 V - 5 V, 2.5 A, 450 kHz non synchronous buck converter . . . . . . . . . . . 6
2.5 V - 5 V, 1 A, 600 kHz synchronous boost converter . . . . . . . . . . . . . . 10
P-channel FETs as load switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4
5
6
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
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Description
1
Description
P-channel MOSFETs don't play a relevant role in high-current applications, where a low
R
DS(on)
is required to minimize the system conduction losses. In fact, with the same die-
size, the P-channel device’s R
DS(on)
is around 2.5/3 times higher than N-channel one, in
other words, a bigger die-size for P-channel structures is needed to achieve the same on-
state performance. This is a serious drawback in terms of overall system cost, efficiency and
thermal management when the system works at a high switching frequency. If the die-size is
bigger, device’s intrinsic capacitances and switching losses are higher. However, there are
several application segments where P-channel FETs can be used with a good performance,
thanks to their electrical features. First of all, in low power DC-DC converters (buck
converter, with maximum load current in the range of 2 - 3 A), a P-channel device can be
used as high-side switch, without any additional external gate driving circuitry (i.e. charge
pump), simplifying the overall circuit complexity. Secondly, in boost converters with low input
voltages, a P-channel device can be used as an output synchronous rectifier, replacing a
low-VF diode and improving the converter efficiency thanks to its figure-of-merit (FOM =
R
DS(on)
* Q
G
). Finally, one of the most common P-channel MOSFET applications is the load
switch, a pass element connecting a power source (battery, adapter) to a given load
(display, ASIC…); by shutting off the load switch, the loads can be temporarily disconnected
improving battery autonomy. Load switches are gaining ever-increasing importance
because battery life is becoming one of the most important requirements for modern
handheld devices.
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P-channel technology overview
AN4391
2
P-channel technology overview
The main target of silicon technology for P-channel structure has always been the R
DS(on)
improvement. Old planar devices (Figure
1)
show specific R
DS(on)
(also known as R
DS(on)
x
area) values, measured in m
Ω
*
mm
2
, not competitive, with bigger die-sizes to achieve the
desired specifications. But, in this way, costs increase and the dynamic performance of the
FET worses, due to higher intrinsic capacitances. To center the electrical specifications
required by modern applications, the fixed course is to choose trench technology for new
low voltage P-channel MOSFETs. New STripFET VI DeepGATE trench technology develops
in order to produce a P-channel Power MOSFET with low R
DS(on)
and high robustness
during reliability stress. The cross section of new trench MOSFET, highlighting both body
and source contacts, is reported in
Figure 2.
Figure 1. P-channel planar device structure
GIPG131120130855FSR
Figure 2. STripFET VI DeepGATE technology structure
GIPG131120130858FSR
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P-channel technology overview
In a trench structure, the gate electrode is made up of a deep dug polysilicon electrode,
isolated by a gate oxide layer. So, the trench extends beyond the bottom of N- body region
to form a channel connecting P+ source region to P- drift region. The elimination of JFET
region, which affects negatively the R
DS(on)
planar structures, allows very competitive
R
DS(on)
values to be achieved and the cell pitch to be reduced, with additional benefits in
other R
DS(on)
components.The main electrical parameters of two MOSFETs are reported in
Table 1:
the STL30P3LLH6 is realized with the new STripFET VI DeepGATE technology
and is compared with an old planar device.
Table 1. MOSFET electrical parameters
Type
BV
DSS
@ 250
µA
> 30 V
> 30 V
R
DS(on)
typ. @ 5 V
39 mΩ
65 mΩ
R
DS(on)
typ. @ 10
V
28 mΩ
45 mΩ
V
TH
@ 250
C
iss
@ 25 V C
rss
@ 25 V
µA
1.8 V
1.6 V
1300 pF
1350 pF
125 pF
130 pF
C
oss
@ 25
V
175 pF
490 pF
R
G
2.3
Ω
3
Ω
STL30P3LLH6
Old planar
device
In
Figure 3
there is a comparison between the R
DS(on)
x area and die-size of two above
mentioned devices:
Figure 3. STripFET VI DeepGATE technology vs. planar one
GIPG131120130900FSR
As shown in the previous chart, the STL30P3LLH6 R
DS(on)
x area improvement is around
60% (both at 4.5 V and 10 V), while its die-size is halved.
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