AN4296
Application note
Overview and tips for using STM32F303/328/334/358xx CCM RAM
with IAR EWARM, Keil MDK-ARM and GNU-based toolchains
Introduction
The purpose of this application note is to give a presentation of the core coupled memory
(CCM) RAM available on STM32F303xB/xC and STM32F358xC microcontrollers and
describe what is required to execute part of the application code from this memory region
using different toolchains.
This application note is divided into four sections: the first section gives an overview of the
STM32F3 CCM RAM, while the next sections describe the steps required to execute part of
the application code from CCM RAM using the following toolchains:
•
•
•
IAR EWARM
KEIL MDK-ARM
™
RIDE and Atollic GNU based toolchain
The procedures described throughout the document are applicable to other RAM regions
such as the CCM data RAM of some F4 devices, or external SRAM.
Refer to
Table 1
for the list microcontrollers embedding CCM RAM.
Table 1. Applicable products
Product family
Microcontrollers
Part numbers or product categories
STM32F303xB, STM32F303xC, STM32F358xC
STM32F303x6/x8, STM32F328x8, STM32F334x4/x6/x8
September 2014
DocID024590 Rev 3
1/25
www.st.com
1
Contents
AN4296
Contents
1
Overview of STM32F303xB/C and STM32F358xC CCM RAM . . . . . . . . 5
1.1
1.2
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
STM32F303xB/C and STM32F358xC CCM RAM features . . . . . . . . . . . . 6
1.2.1
1.2.2
1.2.3
1.2.4
CCM RAM mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
CCM RAM remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
CCM RAM write protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
CCM RAM parity check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
Execute application code from CCM RAM
using the IAR EWARM toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Executing a simple code from CCM RAM (except for interrupt handler) . . 8
2.1.1
2.1.2
Executing a source file from CCM RAM . . . . . . . . . . . . . . . . . . . . . . . . . 9
Executing one or more functions from CCM RAM . . . . . . . . . . . . . . . . . 10
Updating the linker file (.icf) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Updating the startup file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Place the interrupt handler in CCM RAM . . . . . . . . . . . . . . . . . . . . . . . . 13
Remap the vector table to CCM RAM . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2
Executing an interrupt handler from CCM RAM . . . . . . . . . . . . . . . . . . . . .11
2.2.1
2.2.2
2.2.3
2.2.4
2.3
Executing a library (.a) from CCM RAM . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3
Execute application code from CCM RAM
using the KEIL MDK-ARM toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
3.2
3.3
Executing a function or an interrupt handler from CCM RAM . . . . . . . . . 16
Executing a source file from CCM RAM . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Executing a library or a library module from CCM RAM . . . . . . . . . . . . . . 18
4
Execute application code from CCM RAM
using a GNU-based toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1
4.2
4.3
Executing a function or an interrupt handler from CCM RAM . . . . . . . . . 19
Executing a file from CCM RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Executing a library from CCM RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/25
DocID024590 Rev 3
AN4296
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Applicable products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
CCM RAM organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DocID024590 Rev 3
3/25
3
List of figures
AN4296
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
STM32F303xB/xC and STM32F358xC system architecture . . . . . . . . . . . . . . . . . . . . . . . . 6
EWARM linker update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
EWARM file placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
EWARM function placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
EWARM linker update for interrupt handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
EWARM startup file update for interrupt handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
CCM RAM area definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
EWARM section initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
EWARM library placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
EWARM library module placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
MDK-ARM scatter file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
MDK-ARM Options menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
MDK-ARM function placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
MDK-ARM target memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MDK-ARM file placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MDK-ARM library placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
GNU linker update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
GNU linker section definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
GNU function placement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
GNU file placement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
GNU library placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4/25
DocID024590 Rev 3
AN4296
Overview of STM32F303xB/C and STM32F358xC CCM RAM
1
1.1
Overview of STM32F303xB/C and STM32F358xC CCM
RAM
Purpose
The STM32F303xB/C and STM32F358xC CCM RAM is tightly coupled with the Cortex™
core. it is primarily intended to execute code at maximum system clock frequency (72 MHz)
without any wait state penalty. It thus allows to significantly decrease critical task execution
time, compared to code execution from Flash memory.
CCM RAM is typically used for real-time and computation intensive routines, such as:
•
•
•
Digital power conversion control loops (switch mode power supplies, lighting)
Field-oriented 3-phase motor control
Real-time DSP tasks
When code is located in CCM RAM and data stored in the regular SRAM, the Cortex-M4
core is in the optimum Harvard configuration. A dedicated zero-wait state memory is
connected to each of its I- and D-bus (refer to
Figure 1: STM32F303xB/xC and
STM32F358xC system architecture)
and can thus perform at 1.25DMIPS/MHz up to
72 MHz, with a deterministic performance of 90 DMIPS. This also guarantees a minimal
latency if interrupt service routines are placed in the CCM RAM.
Example
A benchmark between the STM32F103xx and STM32F303xx microcontrollers using
STMicroelectronics MC library V3.4 shows that in case of single motor control using 3 shunt
algorithm, the FOC total execution time for STM32F303xx is 16.97 µs compared to 21.3 µs
in STMF103xx (see note below); with FOC core and sensorless core loops running from
CCM RAM for STM32F303xx. This means that the STM32F303xx is 20.33 % faster than the
STM32F103xx thanks to the CCM RAM.
Note:
FOC routines are programmed in structured C, so the values provided above do not
represent the fastest possible execution both for STM32F103xx and STM32F303xx. In
addition, the execution time is also function of the compiler used and of its version.
When the CCM RAM is not used for code, it can hold data like an extra SRAM memory.
However it cannot be accessed through DMA. It is not recommended to place both code
and data together in the CCM, since the Cortex core will have to fetch code and data from
the same memory with the risk of collisions. The core would then be in the Von Neuman
configuration, and its performance would drop from 1.25DMIPS/MHz to below
1DMIPS/MHz.
DocID024590 Rev 3
5/25
24