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MGA-31716_15

产品描述0.1 W High Linearity Driver Amplifier
文件大小536KB,共19页
制造商AVAGO
官网地址http://www.avagotech.com/
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MGA-31716_15概述

0.1 W High Linearity Driver Amplifier

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MGA-31716
0.1 W High Linearity Driver Amplifier
Data Sheet
Description
Avago Technologies MGA-31716 is a high linearity driver
MMIC Amplifier housed in a standard QFN 3X3 16 lead
plastic package. It features high gain, low operating
current, low noise figure with good input and output
return loss. Power consumption can be further reduced
by reducing the quiescent bias current using two external
bias resistors. The device can be easily matched at different
frequencies to obtain optimal linearity performance at
those frequencies.
MGA-31716 is especially ideal for 50
W
wireless infrastruc-
ture application operating from DC to 2 GHz frequency
range. With the high linearity, excellent gain flatness and
low noise figure the MGA-31716 may be utilized as a driver
amplifier in the transmit chain and as a second stage LNA
in the receiver chain.
This device uses Avago Technologies proprietary 0.25
mm
GaAs Enhancement mode PHEMT process.
Features
Very high linearity at low DC bias power
[1]
High Gain with good gain flatness
ROHS compliant
Good Noise Figure
Halogen free
Advanced enhancement-mode PHEMT Technology
QFN 3X3 16-Lead standard package
Lead-free MSL1
Specifications
At 900 MHz, Vd = 5 V, Id = 58 mA (typ) @ 25° C
OIP3 = 41.0 dBm
Noise Figure = 1.9 dB
Gain = 20.2 dB
P1dB = 21.2 dBm
IRL = 16.7dB, ORL = 15.9 dB
Note:
1. The MGA-31716 has a superior LFOM of 16.5 dB. Linearity-Figure-of-
Merit (LFOM) is the ratio of OIP3 to total DC bias power.
Pin connections and Package Marking
31716
YYWW
XXXX
TOP VIEW
Vbias 16
Vctrl 15
NC 14
Vd 13
NC 12
RFout 11
RFout 10
NC 9
8 NC
7 NC
6 NC
5 NC
Gnd
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 60 V
ESD Human Body Model = 300 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
1 NC
2 NC
3 RFin
4 NC
Vbias
NC - not connected
RFIN
Vctrl
Biasing Network
RFOUT
Vdd
BOTTOM VIEW
Notes:
Package marking provides orientation and identification
“31716” = Device Part Number
“YYWW” = Work Week and Year of manufacturing
“XXXX” = Last 4 digit of Lot Number
Figure 1. Simplified Application Circuit

 
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