MGA-30116
150MHz – 1GHz
½ Watt High Linearity Amplifier
Data Sheet
Description
Avago Technologies’ MGA-30116 is a high linearity ½ Watt
PA with good OIP3 performance and exceptionally good
PAE at p1dB gain compression point, achieved through
the use of Avago Technologies’ proprietary 0.25um GaAs
Enhancement-mode pHEMT process.
The adjustable temperature compensated internal bias
circuit allowed the device to be operated at either class A
or class AB operation
The MGA-30116 is housed inside a standard 16 pin QFN
3X3 package.
Features
High linearity and P1dB
Built in adjustable temperature compensated internal
bias circuitry
GaAs E-pHEMT Technology
[1]
Standard QFN 3X3 package
5V supply
Excellent uniformity in product specifications
Tape-and-Reel packaging option available
MSL-1 and Lead-free
High MTTF for base station application
Applications
Class A driver amplifier for GSM/CDMA Base Stations.
General purpose gain block.
Specifications
900MHz; 5V, 202.8mA (typical)
17.0 dB Gain
44.1 dBm Output IP3
27.7 dBm Output Power at 1dB gain compression
47.0% PAE at P1dB
2.0 dB Noise Figure
Component Image
16 pins QFN 3x3
RFgnd 16
GND
14
NC
13
NC
12
VDD/RFout 11
VDD/RFout 10
NC
9
8
NC
7
GND
6 NC
5
NC
Vg 15
30116
YYWW
XXXX
1 Vm
GND
2 Vbias
3
RF
in
4
NC
nc
=
not connected
Notes:
1. Enhancement mode technology employs positive gate voltage,
thereby eliminating the need of negative gate voltage associated
with conventional depletion mode devices.
TOP VIEW
BOTTOM VIEW
Notes:
Package marking provides orientation and identification
“30116” = Device Part Number
“YYWW” = Work Week and Year of manufacture
“XXXX” = Last 4 digit of Lot number
Attention:
Observe
precautions for
handling electrostatic sensitive
devices.
ESD Machine Model = 60 V
ESD Human Body Model = 300 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
Absolute Maximum
Rating
[1]
T
A
=25C
Symbol
V
dd,max
I
ds,max
V
ctrl,max
P
in,max
P
diss
T
j, max
T
STG
Parameter
Device Voltage, RF output to ground
Device Drain Current
Control Voltage
CW RF Input Power
Total Power Dissipation
[3]
Junction Temperature
Storage Temperature
Units
V
mA
V
dBm
W
C
C
Absolute Max.
5.5
400
5.5
22
2.2
150
-65 to 150
Thermal Resistance
[2]
jc
= 33
C/W
(Vdd=5, Ids=200mA, Tc=85C)
Notes:
1. Operation of this device in excess of any of these limits may cause permanent damage.
2. Thermal resistance measured using Infra-Red measurement technique.
3. This is limited by maximum Vdd and Ids. Derate 30.3mW/
C
for Tc> 77.5
C.
Electrical
Specifications
[4]
T
A
= 25C, Vdd =5V, Vctrl =5V, RF performance at 900 MHz, measured on demo board (see Fig. 7) unless otherwise
specified.
Symbol
Ids
Ictrl
Gain
OIP3
[5]
OP1dB
PAE
NF
S11
S22
S12
Parameter
and Test Condition
Quiescent current
Vctrl current
Gain
Output Third Order Intercept Point
Output Power at 1dB Gain Compression
Power Added Efficiency
Noise Figure
Input Return Loss, 50Ω source
Output Return Loss, 50Ω load
Reverse Isolation
Units
mA
mA
dB
dBm
dBm
%
dB
dB
dB
dB
Min.
165
-
15.5
41
26.2
-
-
-
-
-
Typ.
202.8
7
17.0
44.1
27.7
47.0
2.0
-14
-14
-23.5
Max.
240
-
18.5
-
-
-
-
-
-
-
Notes:
4. Measurements at 900MHz obtained using demo board described in Figure 6 and 7.
5. 900 MHz OIP3 test condition: F
RF1
- F
RF2
= 10MHz with input power of -5dBm per tone measured at worse side band
6. Use proper biasing, heat sink and de-rating to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and
application note (if applicable) for more details.
2
Product
Consistency Distribution Charts
[1,2]
CPK =
2.209
Stdev =
5.612
CPK = 1.645
stdev = 0.628
Figure 1. Ids at
900MHz;
LSL=165mA, nominal =202.8mA, USL=240mA
Figure
2. OIP3
at
900MHz;
LSL=41dB, nominal=44.1dBm
CPK =
27.78
Stdev = 0.018
stdev =0.187
Figure 3.
P1dB
at
900MHz;
LSL,
26.2dBm,
nominal=27.7dBm
Figure
4. PAE
at
P1dB 900MHz;
nominal=47.0%
CPK = 6.858
Stdev = 0.0729
Figure
5.
Gain at
900MHz;
LSL=15.5dB, Nominal =17.0dB, USL=18.5dB,
Notes:
1. Distribution data sample size is 500 samples taken from 2 different wafer lots and 3 different wafers. Future wafers allocated to this product may
have nominal values anywhere between the upper and lower limits.
2. Measurements were made on a characterization test board, which represents a trade-off between optimal OIP3, gain, P1dB and PAE. Circuit trace
losses have not been de-embedded from measurements above.
3
Demo
Board
(750MHz to 1GHz)
Vctrl
Vdd
C10
L4
C6
C7
C8
C9
GND
15
Vg
16
14
Rbias
Vm
1
Vbias
2
C1
RFin
L1
C2
RFin
3
NC
4
RFgnd
NC
13
L3
NC
12
Vdd
RFout
11
Vdd
RFout
10
C3
NC
9
L2
C4
C11
RFout
GND
NC
NC
NC
5
6
7
8
Top View
Figure 6. Demo
board
and application schematic (750MHz to 1GHz)
Demo
Board Part
List
Circuit Symbol
L1
L2
L3
L4
C1
C2
C3
C4
C6
C7
C8
C9
C10
C11
Size
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0805
0402
0402
Value
10nH
6.8nH
8.2nH
15nH
6pF
1.8pF
4.3pF
5.6pF
100pF
0.1uF
100pF
2.2uF
100pF
100pF
Part
Number
LLP1005-FH10NC (TOKO)
LLP1005-FH6N8C (TOKO)
LL1005-FHL8N2J (TOKO)
MLK1005S15NJ (TDK)
C1005C0G1H060D (TDK)
GRM1555C1H1R8CZ01B (Murata)
GRM1555C1H4R3CZ01B (Murata)
GRM1555C1H5R6CZ01B (Murata)
GRM1555C1H101JZ01B (Murata)
GRM155R71E103KA01B (Murata)
GRM1555C1H101JZ01B (Murata)
GRM21BR61E225KA12L (Murata)
GRM1555C1H101JZ01B (Murata)
GRM1555C1H101JZ01B (Murata)
Description
MLC Inductor
MLC Inductor
MLC Inductor
MLC Inductor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Ceramic Chip Capacitor
Note: Rbias is used to lower the quiescent current. Default is 0 ohm
4
Figure
7.
Demo
board
Layout
Recommended PCB material is 10 mils Rogers RO4350, with FR4 backing for mechanical strength.
Suggested component values may vary according to layout and PCB material.
MGA-30116 Typical
Performance
(750MHz to 1GHz)
T
A
= +25C, Vdd = 5V, Vctrl =5V, Input Signal=CW unless stated otherwise.
250
240
230
220
210
200
190
180
170
160
150
0.75
48
47
46
45
44
43
42
41
40
39
38
0.75
85ºC
25ºC
-40ºC
0.8
0.85
0.9
Frequency (GHz)
0.95
1
OIP3 (dB)
Ids (mA)
85ºC
25ºC
-40ºC
0.8
0.85
0.9
Frequency (GHz)
0.95
1
Figure
8. Over
Temperature Ids vs Frequency
Figure
9. Over
Temperature
OIP3
vs Frequency
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
