CML Microcircuits
COMMUNICA
TION SEMICONDUCTORS
CMX7031/CMX7041
The Two-Way Radio
Processor
Provisional Issue
D/7031/41_FI1.x/13 July 2013
DATASHEET
7031/7041 FI-1.5: Baseband Audio and Data Processor with Auxiliary System
Clocks, ADCs and DACs for use in Analogue Radio Systems
Features
Concurrent Audio/Signalling/Data Operations
Full Audio-band Processing:
Pre and De-emphasis, Compandor,
Scrambler and Selectable 2.55/3.0 kHz Filters
2 x RF Synthesisers (CMX7031 only)
Inband Signalling: Selcall, DTMF, NOAA NWR
3 x Analogue Inputs (Mic or Discriminator)
2 x Auxiliary ADCs and 4 x Auxiliary DACs
C-BUS Serial Interface to Host µController
Low-power (3.0V to 3.6V) Operation
Available in 64-pin, 48-pin LQFP and VQFN
Packages
DAC outputs
Selectable Audio Processing Order
MSK/FFSK Data Modem with Packet or Free-
format Modes with FEC, CRC, Interleaving and
Scrambling
Enhanced DSC Modem for Marine
Applications, offering support for DSC
expansion sequences and transmission of
continuous distress signals
Sub-Audio Signalling: CTCSS, DCS, XTCSS
Tx Outputs for Single, Two-Point or I/Q Mod.
559bps PSK Modulator
2 x Auxiliary System Clock Outputs
Flexible Powersave Modes
ADC inputs
3.0V to 3.6V
Modulator
Discriminator
RF
RF Synthesiser 1
RF Synthesiser 2
CMX7031 only
GPIO
System Clock 1
System Clock 2
Reference Clock
CMX7031 / CMX7041
The Two-Way Radio Processor
Built on
FirmASIC
®
technology
C-BUS
Host
µC
This document contains:
Datasheet
User
Manual
1.
Brief Description
The CMX7031/CMX7041 FI 1.5 is a full-function, half-duplex, audio, signalling and data processor IC. This
makes it a suitable device for both the leisure radio markets (FRS, MURS, PMR446 and GMRS) and for
professional radio products (PMR/LMR, Marine and Trunking) with or without signalling and data facilities.
The device utilises CML’s proprietary
FirmASIC
component technology. On-chip sub-systems are
configured by a Function Image™: this is a data file that is uploaded during device initialisation and defines
the device’s function and feature set. The Function Image™ can be loaded automatically from an external
EEPROM or from a host µController over the built-in C-BUS serial interface. The device’s functions and
features can be enhanced by subsequent Function Image™ releases, facilitating in-the-field upgrades.
This document refers specifically to the features provided by Function Image™ 1.5.
Continued…
2013 CML Microsystems Plc
The Two-Way Radio Processor
CMX7031/CMX7041
The CMX7031 features two on-chip RF synthesisers, with easy Rx/Tx frequency changeover, and
programmable system clocks to minimise chip count in the final application.
The CMX7041 is identical in functionality to the CMX7031 with the exception that the two on-chip RF
Synthesisers have been deleted, which enables it to be supplied in a smaller package and with two extra
GPIO pins. This document refers to both parts generically as the CMX7031, unless otherwise stated.
When loaded with Function Image™ 1.5, both devices perform simultaneous processing of sub-audio and
inband signalling and audio band processing (including frequency inversion scrambling, companding and
pre- or de-emphasis).
Other features include a complete MSK/FFSK modem for packetised or free-format data, a DSC modem,
two auxiliary ADC channels with four selectable inputs and up to four auxiliary DAC interfaces (with an
optional RAMDAC on the first DAC output, to facilitate transmitter power ramping).
The device has flexible powersaving modes and is available in both LQFP and VQFN packages.
Note that text shown in pale grey indicates features that will be supported in future versions of the device.
This Datasheet is the first part of a two-part document comprising Datasheet and User Manual: the User
Manual can be obtained by registering your interest in these products with your local CML representative.
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The Two-Way Radio Processor
CMX7031/CMX7041
CONTENTS
Section
Page
1. Brief Description ...................................................................................................................... 1
1.1.
History........................................................................................................................... 5
2. Block Diagram .......................................................................................................................... 8
3. Signal List................................................................................................................................. 9
3.1.
Signal Definitions ........................................................................................................ 11
4. External Components............................................................................................................ 12
5. PCB Layout Guidelines and Power Supply Decoupling .................................................... 15
6. General Description............................................................................................................... 17
7. Detailed Descriptions ............................................................................................................ 19
7.1.
Xtal Frequency............................................................................................................ 19
7.2.
Host Interface ............................................................................................................. 19
7.2.1 C-BUS Operation ................................................................................................. 19
7.3.
Function Image™ Load and Activation ....................................................................... 21
7.3.1 FI Loading from Host Controller ........................................................................... 22
7.3.2 FI Loading from EEPROM ................................................................................... 24
7.4.
Device Control ............................................................................................................ 25
7.4.1 Signal Routing ...................................................................................................... 26
7.4.2 Mode Control ........................................................................................................ 27
7.5.
Audio Functions .......................................................................................................... 28
7.5.1 Audio Receive Mode ............................................................................................ 28
7.5.2 Audio Transmit Mode ........................................................................................... 30
7.5.3 Audio Compandor ................................................................................................ 34
7.6.
Sub-audio Signalling ................................................................................................... 36
7.6.1 Receiving and Decoding CTCSS Tones .............................................................. 36
7.6.2 Receiving and Decoding DCS Codes .................................................................. 38
7.6.3 Transmit CTCSS Tone ......................................................................................... 40
7.6.4 Transmit DCS Code ............................................................................................. 40
7.7.
Inband Signalling – Selcall/DTMF/User Tones ........................................................... 41
7.7.1 Receiving and Decoding Inband Tones ............................................................... 41
7.7.2 Receiving DTMF Tones ....................................................................................... 42
7.7.3 Transmitting Inband Tones .................................................................................. 42
7.7.4 Transmitting DTMF Tones ................................................................................... 42
7.7.5 Alternative Selcall Tone Sets ............................................................................... 43
7.8.
XTCSS Signalling ....................................................................................................... 43
7.8.1 XTCSS Tx ............................................................................................................ 44
7.8.2 XTCSS Rx ............................................................................................................ 44
7.9.
MSK/FFSK Data Modem ............................................................................................ 44
7.9.1 Receiving MSK/FFSK Signals .............................................................................. 45
7.9.2 Transmitting MSK/FFSK Signals.......................................................................... 45
7.10. MSK/FFSK Data Packetising ...................................................................................... 46
7.10.1 Tx Hang Bit .......................................................................................................... 46
7.10.2 Frame Format ...................................................................................................... 46
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CMX7031/CMX7041
7.10.3 Frame Head ......................................................................................................... 47
7.10.4 Data Block Coding ............................................................................................... 47
7.10.5 CRC and FEC Encoding Information ................................................................... 48
7.10.6 Data Interleaving .................................................................................................. 48
7.10.7 Data Scrambling/Privacy Coding.......................................................................... 49
7.10.8 Data Buffer Timing ............................................................................................... 49
7.11. FSK 1200bps DSC Modem ........................................................................................ 50
7.11.1 Receiving 1200 bps FSK (DSC) Signals .............................................................. 51
7.11.2 Transmitting 1200 bps FSK (DSC) Signals .......................................................... 53
7.12. PSK Encoder .............................................................................................................. 54
7.13. NOAA/NWR SAME and WAT Decoding ................................................................... 54
7.13.1 Message Code Format......................................................................................... 55
7.13.2 WAT Detection ..................................................................................................... 55
7.13.3 SAME Decoding ................................................................................................... 55
7.14. Auxiliary ADC Operation ............................................................................................. 56
7.15. Auxiliary DAC/RAMDAC Operation ............................................................................ 57
7.16. RF Synthesiser (CMX7031 only) ................................................................................ 57
7.17. Digital System Clock Generators ................................................................................ 61
7.17.1 Main Clock Operation........................................................................................... 62
7.17.2 System Clock Operation ...................................................................................... 62
7.18. GPIO ........................................................................................................................... 62
7.19. Signal Level Optimisation ........................................................................................... 62
7.19.1 Transmit Path Levels ........................................................................................... 63
7.19.2 Receive Path Levels............................................................................................. 63
7.20. C-BUS Register Summary.......................................................................................... 64
7.20.1 Interrupt Operation ............................................................................................... 65
7.20.2 General Notes ...................................................................................................... 65
8. Performance Specification ................................................................................................... 66
8.1.
Electrical Performance ............................................................................................... 66
8.1.1 Absolute Maximum Ratings ................................................................................. 66
8.1.2 Operating Limits ................................................................................................... 67
8.1.3 Operating Characteristics..................................................................................... 68
8.1.4 Parametric Performance ...................................................................................... 74
8.2.
C-BUS Timing ............................................................................................................. 79
8.3.
Packaging ................................................................................................................... 80
Table
Page
Table 1 Definition of Power Supply and Reference Voltages........................................................ 11
Table 2 Xtal/clock Frequency Settings for Program Block 3 ......................................................... 19
Table 3 BOOTEN Pin States ......................................................................................................... 21
Table 4 CTCSS IRQ Conditions .................................................................................................... 37
Table 5 CTCSS Tones .................................................................................................................. 38
Table 6 DCS Modulation Modes ................................................................................................... 39
Table 7 DCS 23-bit Codes ............................................................................................................ 40
Table 8 Inband Tones ................................................................................................................... 42
Table 9 DTMF Tone Pairs ............................................................................................................. 43
Table 10 Alternative Selcall Tone Sets ......................................................................................... 43
Table 11 Data Frequencies for each Baud Rate ........................................................................... 46
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CMX7031/CMX7041
Table 12 Data Block Formatting Types ......................................................................................... 48
Table 13 Maximum Data Transfer Latency ................................................................................... 49
Table 14 C-BUS Registers ............................................................................................................ 64
Figure
Page
Figure 1 Block Diagram ................................................................................................................... 8
Figure 2 CMX7031 Recommended External Components ........................................................... 12
Figure 3 CMX7041 Recommended External Components ........................................................... 13
Figure 4 CMX7031 Power Supply Connections and De-coupling ................................................. 15
Figure 5 CMX7041 Power Supply Connections and De-coupling ................................................. 16
Figure 6 C-BUS Transactions ....................................................................................................... 20
Figure 7 FI Loading from Host ...................................................................................................... 23
Figure 8 FI Loading from EEPROM .............................................................................................. 24
Figure 9 Signal Routing ................................................................................................................. 26
Figure 10 Rx 12.5kHz Channel Audio Filter Frequency Response ............................................... 29
Figure 11 Rx 25kHz Channel Audio Filter Frequency Response .................................................. 29
Figure 12 De-emphasis Curve for TIA/EIA-603 Compliance ........................................................ 30
Figure 13 Tx Channel Audio Filter Response and Template (ETSI) ............................................. 31
Figure 14 Tx Channel Audio Filter Response and Template (TIA) ............................................... 32
Figure 15 Audio Frequency Pre-emphasis .................................................................................... 33
Figure 16 Expandor Transient Response ..................................................................................... 35
Figure 17 Compressor Transient Response ................................................................................. 35
Figure 18 Low Pass Sub-Audio Band Filter for CTCSS and DCS ................................................ 36
Figure 19 Modulating Waveforms for 1200 and 2400 Baud MSK/FFSK Signals .......................... 46
Figure 20 DSC Format .................................................................................................................. 50
Figure 21 DSC Character Format ................................................................................................. 51
Figure 22 Expanded DSC Format ................................................................................................. 52
Figure 23 AuxADC IRQ Operation ................................................................................................ 56
Figure 24 Example RF Synthesiser Components for a 512MHz Receiver ................................... 57
Figure 25 Single RF Channel Block Diagram ............................................................................... 58
Figure 26 Digital Clock Generation Schemes ............................................................................... 61
Figure 27 Level Adjustments ......................................................................................................... 63
Figure 28 C-BUS Timing ............................................................................................................... 79
Figure 29 Mechanical Outline of 64-pin VQFN (Q1) ..................................................................... 80
Figure 30 Mechanical Outline of 64-pin LQFP (L9) ....................................................................... 80
Figure 31 Mechanical Outline of 48-pin VQFN (Q3) ..................................................................... 81
Figure 32 Mechanical Outline of 48-pin LQFP (L4) ....................................................................... 81
1.1.
Version
13
History
Changes
Added support for DSC expansion sequences (section 7.11), minor modification
to the Status ($C6) register b7 (section 9.1.21) and new bit definition in the
Programming Register (section 9.2.1)
Updated RAMDAC description in section 9.1.4
Function Image Updates (section 9.3) updated
Added SPI port descriptive text in section 7.4.1 and other minor corrections.
Date
17.7.13
12
27.10.11
2013 CML Microsystems Plc
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D/7031/41_FI1.x/13
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