UNISONIC TECHNOLOGIES CO., LTD
UF830K-MT
4.5A, 500V, 1.5Ω, N-CHANNEL
POWER MOSFET
DESCRIPTION
The UTC
UF830K-MT
is a N-Channel enhancement mode
silicon gate power MOSFET is designed high voltage, high speed
power switching applications such as switching regulators,
switching converters, solenoid, motor drivers, relay drivers.
Power MOSFET
FEATURES
* R
DS(ON)
< 1.50Ω @ V
GS
= 10V, I
D
= 2.5 A
* Single Pulse Avalanche Energy Rated
* Rugged- SOA is Power Dissipation Limited
* Fast Switching Speeds
* Linear Transfer Characteristics
* High Input Impedance
SYMBOL
ORDERING INFORMATION
Package
TO-220
TO-220F
TO-220F1
TO-220F2
TO-220F3
TO-251
TO-251S
TO-251S2
TO-251S4
TO-252
TO-252D
Pin Assignment
1
2
3
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
Packing
Tube
Tube
Tube
Tube
Tube
Tube
Tube
Tube
Tube
Tape Reel
Tape Reel
Ordering Number
Lead Free
Halogen Free
UF830KL-TA3-T
UF830KG-TA3-T
UF830KL-TF3-T
UF830KG-TF3-T
UF830KL-TF1-T
UF830KG-TF1-T
UF830KL-TF2-T
UF830KG-TF2-T
UF830KL-TF3T-T
UF830KG-TF3T-T
UF830KL-TM3-T
UF830KG-TM3-T
UF830KL-TMS-T
UF830KG-TMS-T
UF830KL-TMS2-T
UF830KG-TMS2-T
UF830KL-TMS4-T
UF830KG-TMS4-T
UF830KL-TN3-R
UF830KG-TN3-R
UF830KL-TND-R
UF830KG-TND-R
Note: Pin Assignment: G: Gate
D: Drain
S: Source
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Copyright © 2014 Unisonic Technologies Co., Ltd
1 of 7
QW-R209-030.D
UF830K-MT
MARKING
Power MOSFET
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QW-R209-030.D
UF830K-MT
Power MOSFET
ABSOLUTE MAXIMUM RATINGS
(
T
A
= 25°C, Unless Otherwise Specified.)
PARAMETER
SYMBOL
RATINGS
UNIT
Drain to Source Voltage (T
J
=25°C ~125°C)
V
DS
500
V
Drain to Gate Voltage (R
GS
=20kΩ, T
J
=25°C ~125°C)
V
DGR
500
V
Gate to Source Voltage
V
GS
±30
V
Continuous
I
D
4.5
A
Drain Current
Pulsed
I
DM
18
A
TO-220
73
W
TO-220F/TO-220F1
38
W
TO-220F3
Power Dissipation (T
C
= 25°C) TO-220F2
P
D
40
W
TO-251/TO-251S
TO-251S2/ TO-251S4
46
W
TO-252/TO-252D
Single Pulse Avalanche Energy Rating (Note 2)
E
AS
300
mJ
Junction Temperature
T
J
+150
°C
Storage Temperature
T
STG
-55 ~ +150
°C
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. V
DD
=50V, starting T
J
=25°C, L=25mH, R
G
=25Ω, peak I
AS
=4.5A
THERMAL DATA
SYMBOL
RATINGS
62.5
θ
JA
100.3
1.71
3.31
θ
JC
3.125
2.7
°C/W
°C/W
°C/W
°C/W
°C/W
UNIT
°C/W
PARAMETER
TO-220/TO-220F
TO-220F1/TO-220F2
TO-220F3
Junction to Ambient
TO-251/TO-251S
TO-251S2/ TO-251S4
TO-252/TO-252D
TO-220
TO-220F/TO-220F1
TO-220F3
Junction to Case
TO-220F2
TO-251/TO-251S
TO-251S2/ TO-251S4
TO-252/TO-252D
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QW-R209-030.D
UF830K-MT
ELECTRICAL SPECIFICATIONS
(T
A
=25°C, unless otherwise specified.)
SYMBOL
BV
DSS
I
D(ON)
I
DSS
TEST CONDITIONS
I
D
=250μA, V
GS
=0V
V
DS
>I
D(ON)
×R
DS(ON)MAX
, V
GS
=10V
V
DS
= Rated BV
DSS
, V
GS
=0V
V
DS
=0.8×Rated BV
DSS
V
GS
=0V, T
J
= 125°C
V
GS
=±30V
PARAMETER
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
On-State Drain Current (Note 1)
Drain-Source Leakage Current
Power MOSFET
MIN
500
4.5
TYP MAX UNIT
V
A
μA
μA
nA
V
Ω
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
25
250
±100
4.0
1.50
420
66
6.5
48
48
42
44
13.8
5.4
6.0
Gate-Source Leakage Current
I
GSS
ON CHARACTERISTICS
Gate Threshold Voltage
V
GS(TH)
V
GS
=V
DS
, I
D
=250μA
2.0
Static Drain-Source On-State Resistance
R
DS(ON)
I
D
=2.5A, V
GS
=10V (Note 2)
DYNAMIC PARAMETERS
Input Capacitance
C
ISS
Output Capacitance
C
OSS
V
DS
=25V, V
GS
=0V, f=1.0MHz
Reverse Transfer Capacitance
C
RSS
SWITCHING PARAMETERS
Turn-On Delay Time
t
D(ON)
Turn-On Rise Time
t
R
V
DD
=30V, I
D
≈0.5A
R
GS
=25Ω
(Note 2)
Turn-Off Delay Time
t
D(OFF)
Turn-Off Fall Time
t
F
Total Gate Charge
Q
G
V
GS
=10V, I
D
=1.3A, V
DD
=50V
Gate-Source Charge
Q
GS
I
G
=100mA (Note 3)
Gate-Drain Charge
Q
GD
Notes: 1. Pulse Test: Pulse width≤300μs, Duty Cycle≤2%.
2. MOSFET Switching Times are Essentially Independent of Operating Temperature.
3. Gate Charge is Essentially Independent of Operating Temperature.
SOURCE TO DRAIN DIODE SPECIFICATIONS
TYP
MAX UNIT
1.6
V
5.5
A
18
A
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
Source to Drain Diode Voltage
V
SD
T
J
=25°C,I
SD
=4.5A, V
GS
=0V(Note 1)
Continuous Source to Drain Current
I
SD
(Note 2)
Pulse Source to Drain Current
I
SDM
Notes: 1. Pulse Test: Pulse width
≤
300μs, Duty Cycle
≤
2%.
2. Modified MOSFET symbol showing the integral reverse P-N junction diode as below.
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QW-R209-030.D
UF830K-MT
TEST CIRCUITS AND WAVEFORMS
V
DS
Power MOSFET
L
Vary t
P
to Obtain
Required Peak I
AS
V
GS
DUT
0V
t
p
+
V
DD
-
R
G
I
AS
0.01Ω
Unclamped Energy Test Circuit
Unclamped Energy Waveforms
R
L
+
V
DD
-
DUT
R
G
V
GS
Switching Time Test Circuit
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QW-R209-030.D
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