1N6382 − 1N6389 Series
(ICTE−10C − ICTE−36C,
MPTE−8C − MPTE−45C)
1500 Watt Peak Power
Mosorb™ Zener Transient
Voltage Suppressors
Bidirectional*
Mosorb devices are designed to protect voltage sensitive
components from high voltage, high−energy transients. They have
excellent clamping capability, high surge capability, low zener
impedance and fast response time. These devices are
ON Semiconductor’s exclusive, cost-effective, highly reliable
Surmetic™ axial leaded package and are ideally-suited for use in
communication systems, numerical controls, process controls,
medical equipment, business machines, power supplies and many
other industrial/consumer applications, to protect CMOS, MOS and
Bipolar integrated circuits.
Specification Features:
http://onsemi.com
AXIAL LEAD
CASE 41A
PLASTIC
L
MPTE
−xxC
1N
63xx
YYWW
L
ICTE
−xxC
YYWW
L = Assembly Location
MPTE−xxC = ON Device Code
ICTE−xxC = ON Device Code
1N63xx = JEDEC Device Code
YY = Year
WW = Work Week
•
•
•
•
•
•
Working Peak Reverse Voltage Range
−
8 V to 45 V
Peak Power
−
1500 Watts @ 1 ms
ESD Rating of Class 3 (>16 KV) per Human Body Model
Maximum Clamp Voltage @ Peak Pulse Current
Low Leakage < 5
mA
Above 10 V
Response Time is Typically < 1 ns
Mechanical Characteristics:
CASE:
Void-free, transfer-molded, thermosetting plastic
FINISH:
All external surfaces are corrosion resistant and leads are
readily solderable
MAXIMUM LEAD TEMPERATURE FOR SOLDERING PURPOSES:
230°C, 1/16″ from the case for 10 seconds
POLARITY:
Cathode band does not imply polarity
MOUNTING POSITION:
Any
MAXIMUM RATINGS
Rating
Peak Power Dissipation (Note 1)
@ T
L
≤
25°C
Steady State Power Dissipation
@ T
L
≤
75°C, Lead Length = 3/8″
Derated above T
L
= 75°C
Thermal Resistance, Junction−to−Lead
Operating and Storage
Temperature Range
Symbol
P
PK
P
D
Value
1500
5.0
20
R
qJL
T
J
, T
stg
20
−
65 to
+175
Unit
Watts
Watts
mW/°C
°C/W
°C
ORDERING INFORMATION
Device
MPTE−xxC
MPTE−xxCRL4
ICTE−xxC*
ICTE−xxCRL4
1N63xx
1N63xxRL4
Package
Axial Lead
Axial Lead
Axial Lead
Axial Lead
Axial Lead
Axial Lead
Shipping
500 Units/Box
1500/Tape & Reel
500 Units/Box
1500/Tape & Reel
500 Units/Box
1500/Tape & Reel
1. Nonrepetitive current pulse per Figure 4 and derated above T
A
= 25°C
per Figure 2.
*Please see 1N6373 – 1N6381 (ICTE−5
−
ICTE−36, MPTE−5
−
MPTE−45)
for Unidirectional Devices
*ICTE−10C Not Available in 500 Units/Box
©
Semiconductor Components Industries, LLC, 2006
August, 2006
−
Rev. 3
1
Publication Order Number:
1N6382/D
1N6382
−
1N6389 Series (ICTE−10C
−
ICTE−36C, MPTE−8C
−
MPTE−45C)
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
I
PP
V
C
V
RWM
I
R
V
BR
I
T
QV
BR
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
PP
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ V
RWM
Breakdown Voltage @ I
T
Test Current
Maximum Temperature Variation of V
BR
I
PP
I
T
V
C
V
BR
V
RWM
I
R
I
R
V
RWM
V
BR
V
C
I
T
I
PP
I
V
Bi−Directional TVS
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
JEDEC
Device
(ON Device)
1N6382
(MPTE−8C)
1N6383
(MPTE−10C)
1N6384
(MPTE−12C)
1N6385
(MPTE−15C)
1N6386
(MPTE−18C)
1N6387
(MPTE−22C)
1N6388
(MPTE−36C)
1N6389
(MPTE−45C)
ICTE−10C*
ICTE−12C
ICTE−15C
ICTE−18C
ICTE−22C
ICTE−36C
V
RWM
(Note 2)
(Volts)
8.0
10
12
15
18
22
36
45
10
12
15
18
22
36
I
R
@
V
RWM
(mA)
25
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
Breakdown Voltage
V
BR
(Note 3)
(Volts)
Min
9.4
11.7
14.1
17.6
21.2
25.9
42.4
52.9
11.7
14.1
17.6
21.2
25.9
42.4
Nom
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Max
−
−
−
−
−
−
−
−
−
−
−
−
−
−
@ I
T
(mA)
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
V
C
@ I
PP
(Note 4)
V
C
(Volts)
15
16.7
21.2
25
30
37.5
65.2
78.9
16.7
21.2
25
30
37.5
65.2
I
PP
(A)
100
90
70
60
50
40
23
19
90
70
60
50
40
23
V
C
(Volts)
(Note 4)
@ I
PP
=1A
11.3
13.7
16.1
20.1
24.2
29.8
50.6
63.3
13.7
16.1
20.1
24.2
29.8
50.6
@ I
PP
= 10 A
11.5
14.1
16.5
20.6
25.2
32
54.3
70
14.1
16.5
20.6
25.2
32
54.3
QV
BR
(mV/°C)
8.0
12
14
18
21
26
50
60
8.0
12
14
18
21
26
Device
Marking
1N6382
MPTE−8C
1N6383
MPTE−10C
1N6384
MPTE−12C
1N6385
MPTE−15C
1N6386
MPTE−18C
1N6387
MPTE−22C
1N6388
MPTE−36C
1N6389
MPTE−45C
ICTE−10C*
ICTE−12C
ICTE−15C
ICTE−18C
ICTE−22C
ICTE−36C
NOTES:
2. A transient suppressor is normally selected according to the maximum working peak reverse voltage (V
RWM
), which should be equal to
or greater than the dc or continuous peak operating voltage level.
3. V
BR
measured at pulse test current I
T
at an ambient temperature of 25°C and minimum voltage in V
BR
is to be controlled.
4. Surge current waveform per Figure 4 and derate per Figures 1 and 2.
*Not Available in the 500 Units/Box.
http://onsemi.com
2
1N6382
−
1N6389 Series (ICTE−10C
−
ICTE−36C, MPTE−8C
−
MPTE−45C)
PEAK PULSE DERATING IN % OF
PEAK POWER OR CURRENT @ TA = 25
°
C
100
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 5
PPK , PEAK POWER (kW)
100
80
60
40
20
0
0
25
50
75
100 125 150 175 200
T
A
, AMBIENT TEMPERATURE (°C)
10
1
0.1
ms
1
ms
10
ms
100
ms
1 ms
10 ms
t
P
, PULSE WIDTH
Figure 1. Pulse Rating Curve
Figure 2. Pulse Derating Curve
PD , STEADY STATE POWER DISSIPATION (WATTS)
3/8″
5
4
3
2
1
0
0
25
50
75
100 125 150 175
T
L
, LEAD TEMPERATURE (°C)
200
0
0
IPP, VALUE (%)
3/8″
100
t
r
≤
10
ms
PEAK VALUE − I
PP
PULSE WIDTH (t
P
) IS DEFINED AS
THAT POINT WHERE THE PEAK
CURRENT DECAYS TO 50% OF I
PP
.
HALF VALUE −
50
t
P
I
PP
2
1
2
t, TIME (ms)
3
4
Figure 3. Steady State Power Derating
Figure 4. Pulse Waveform
http://onsemi.com
3
1N6382
−
1N6389 Series (ICTE−10C
−
ICTE−36C, MPTE−8C
−
MPTE−45C)
1N6373, ICTE-5, MPTE-5,
through
1N6389, ICTE-45, C, MPTE-45, C
1000
500
IT , TEST CURRENT (AMPS)
200
100
50
20
10
5
2
1
0.3
0.5 0.7 1
2
3
5 7 10
20 30
DV
BR
, INSTANTANEOUS INCREASE IN V
BR
ABOVE V
BR(NOM)
(VOLTS)
T
L
= 25°C
t
P
= 10
ms
V
BR(MIN)
= 6.0 to 11.7 V
19 V
42.4 V
21.2 V
1000
500
IT , TEST CURRENT (AMPS)
200
100
50
20
10
5
2
1
0.3
0.5 0.7 1
2
3
5 7 10
20 30
DV
BR
, INSTANTANEOUS INCREASE IN V
BR
ABOVE V
BR(NOM)
(VOLTS)
180 V
120 V
T
L
= 25°C
t
P
= 10
ms
1.5KE6.8CA
through
1.5KE200CA
V
BR(NOM)
= 6.8 to 13 V
20 V
24 V
43 V
75 V
Figure 5. Dynamic Impedance
1
0.7
0.5
0.3
DERATING FACTOR
0.2
0.1
0.07
0.05
0.03
0.02
10
ms
0.01
0.1
0.2
0.5
1
2
5
10
D, DUTY CYCLE (%)
20
50
100
PULSE WIDTH
10 ms
1 ms
100
ms
Figure 6. Typical Derating Factor for Duty Cycle
http://onsemi.com
4
1N6382
−
1N6389 Series (ICTE−10C
−
ICTE−36C, MPTE−8C
−
MPTE−45C)
APPLICATION NOTES
RESPONSE TIME
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitance
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 7.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 8. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. These devices have
excellent response time, typically in the picosecond range
and negligible inductance. However, external inductive
effects could produce unacceptable overshoot. Proper
circuit layout, minimum lead lengths and placing the
suppressor device as close as possible to the equipment or
components to be protected will minimize this overshoot.
Some input impedance represented by Z
in
is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25°C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 6. Average power must be derated as the lead or
ambient temperature rises above 25°C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 6 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10
ms
pulse. However, when the derating factor for a
given pulse of Figure 6 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
TYPICAL PROTECTION CIRCUIT
Z
in
V
in
LOAD
V
L
V
V
in
(TRANSIENT)
V
L
V
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
V
in
(TRANSIENT)
V
L
V
in
t
d
t
D
= TIME DELAY DUE TO CAPACITIVE EFFECT
t
t
Figure 7.
Figure 8.
http://onsemi.com
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
