NCP6354
3MHz, 2A Fixed-Frequency
Synchronous Buck
Converter
High Efficiency, Low Ripple, Adjustable
Output Voltage
The NCP6354, a synchronous buck converter, which is optimized to
supply the different sub systems of portable applications powered by
one cell Li−ion or three cell Alkaline/NiCd/NiMH batteries. The
device is able to deliver up to 2 A on an external adjustable voltage.
Operation with 3 MHz switching frequency allows employing small
size inductor and capacitors. Input supply voltage feedforward control
is employed to deal with wide input voltage range. Synchronous
rectification offers improved system efficiency. The NCP6354 is in a
space saving, low profile 2.0x2.0x0.75 mm WDFN−8 package.
Features
1
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MARKING
DIAGRAM
WDFN8
CASE 511BE
A2
M
G
1
A2MG
G
= Specific Device Code
= Date Code
= Pb−Free Package
(*Note: Microdot may be in either location)
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•
•
•
•
•
•
•
•
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2.3 V to 5.5 V Input Voltage Range
External Adjustable Voltage
Up to 2 A Output Current
3 MHz Switching Frequency
Synchronous Rectification
Enable Input
Power Good Output
Soft Start
Over Current Protection
Active Discharge when Disabled
Thermal Shutdown Protection
WDFN−8, 2x2 mm, 0.5 mm Pitch Package
Maximum 0.8 mm Height for Super Thin Applications
These are Pb−Free Devices
Cellular Phones, Smart Phones, and PDAs
Portable Media Players
Digital Still Cameras
Wireless and DSL Modems
USB Powered Devices
Point of Load
Game and Entertainment System
BLOCK DIAGRAM
PGND
SW
AGND
FB
1
2
9
3
4
(Top View)
6
5
PG
EN
8
7
PVIN
AVIN
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 14 of this data sheet.
Typical Applications
©
Semiconductor Components Industries, LLC, 2012
November, 2012
−
Rev. 2
1
Publication Order Number:
NCP6354/D
NCP6354
Vo = 0.6V to Vin
1uH
NCP6354
PGND
Cfb
R1
SW
AGND
FB
R2
PVIN
AVIN
PG
EN
Cin
10uF
Vin = 2.3V to 5.5V
Rpg
1M
Power Good
Enable
Cout
10uF
Figure 1. Typical Application Circuit
PIN DESCRIPTION
Pin
1
2
3
4
5
6
Name
PGND
SW
AGND
FB
EN
PG
Type
Power
Ground
Power
Output
Analog
Ground
Analog
Input
Digital
Input
Digital
Output
Analog
Input
Power
Input
Exposed
Pad
Description
Power Ground for power, analog blocks. Must be connected to the system ground.
Switch Power pin connects power transistors to one end of the inductor.
Analog Ground analog and digital blocks. Must be connected to the system ground.
Feedback Voltage from the buck converter output. This is the input to the error amplifier. This pin is
connected to the resistor divider network between the output and AGND.
Enable of the IC. High level at this pin enables the device. Low level at this pin disables the device.
PG pin is for NCP6354 with Power Good option. It is open drain output. Low level at this pin
indicates the device is not in power good, while high impedance at this pin indicates the device is
in power good.
Analog Supply. This pin is the analog and the digital supply of the device. An optional 1
mF
or
larger ceramic capacitor bypasses this input to the ground. This capacitor should be placed as
close as possible to this input.
Power Supply Input. This pin is the power supply of the device. A 10
mF
or larger ceramic capacitor
must bypass this input to the ground. This capacitor should be placed as close a possible to this
input.
Exposed Pad. Must be soldered to system ground to achieve power dissipation performances.
This pin is internally unconnected
7
AVIN
8
PVIN
9
PAD
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2
NCP6354
Vin
PVIN
8
Cin
10uF
SW
2
L
1uH
Vo
Cout
10uF
AVIN
7
UVLO
PWM / PFM
Control
PGND
1
R1
Enable
Cfb
EN
5
Rpg
1M
Power Good
PG
6
Logic Control
&
Current Limit
&
Thermal
Shutdown
Error
Amp
FB
4
R2
AGND
3
Reference
Voltage
Figure 2. Functional Block Diagram.
MAXIMUM RATINGS
Value
Rating
Input Supply Voltage to GND
Switch Node to GND
EN, PG to GND
FB to GND
Human Body Model (HBM) ESD Rating are (Note 1)
Machine Model (MM) ESD Rating (Note 1)
Latchup Current (Note 2)
Operating Junction Temperature Range (Note 3)
Operating Ambient Temperature Range
Storage Temperature Range
Thermal Resistance Junction−to−Top Case (Note 4)
Thermal Resistance Junction−to−Board (Note 4)
Thermal Resistance Junction−to−Ambient (Note 4)
Power Dissipation (Note 5)
Moisture Sensitivity Level (Note 6)
Symbol
V
PVIN
, V
AVIN
V
SW
V
EN
, V
PG
V
FB
ESD HBM
ESD MM
I
LU
T
J
T
A
T
STG
R
qJC
R
qJB
R
qJA
P
D
MSL
−100
−40
−40
−55
12
30
62
1.6
1
Min
−0.3
−0.3
−0.3
−0.3
Max
7.0
7.0
7.0
2.5
2000
200
100
125
85
150
Unit
V
V
V
V
V
V
mA
°C
°C
°C
°C/W
°C/W
°C/W
W
−
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM)
±2.0
kV per JEDEC standard: JESD22−A114.
Machine Model (MM)
±200
V per JEDEC standard: JESD22−A115.
2. Latchup Current per JEDEC standard: JESD78 Class II.
3. The thermal shutdown set to 150°C (typical) avoids potential irreversible damage on the device due to power dissipation.
4. The thermal resistance values are dependent of the PCB heat dissipation. Board used to drive these data was an 80 x 50mm NCP6334EVB
board. It is a multilayer board with 1−once internal power and ground planes and 2−once copper traces on top and bottom of the board. If
the copper trances of top and bottom are 1−once too, R
qJC
= 11°C/W, R
qJB
= 30°C/W, and R
qJA
= 72°C/W.
5. The maximum power dissipation (PD) is dependent on input voltage, maximum output current and external components selected.
6. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
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NCP6354
ELECTRICAL CHARACTERISTICS
(V
IN
= 3.6 V, V
OUT
= 1.8 V, L = 1
mH,
C = 10
mF,
typical values are referenced to T
J
= 25°C, Min and Max values are referenced to T
J
up to
125°C. unless other noted.)
Characteristics
SUPPLY VOLTAGE
Input Voltage V
IN
Range
SUPPLY CURRENT
V
IN
Quiescent Supply Current
V
IN
Shutdown Current
OUTPUT VOLTAGE
Output Voltage Range
FB Voltage
FB Voltage in Load Regulation
FB Voltage in Line Regulation
Maximum Duty Cycle
OUTPUT CURRENT
Output Current Capability
Output Peak Current Limit
VOLTAGE MONITOR
V
IN
UVLO Falling Threshold
V
IN
UVLO Hysteresis
Power Good Low Threshold
Power Good Hysteresis
V
OUT
falls down to cross the threshold
(percentage of FB voltage)
V
OUT
rises up to cross the threshold
(percentage of Power Good Low
Threshold (V
PGL
) voltage)
From EN rising edge to PG going high.
From EN falling edge to PG going low.
(Note 7)
From V
FB
going higher than 95%
nominal level to PG going high. Not for
the first time in start up. (Note 7)
From V
FB
going lower than 90%
nominal level to PG going low. (Note 7)
Voltage at PG pin with 5mA sink
current
3.6 V at PG pin when power good valid
V
INUV−
V
INHYS
V
PGL
V
PGHYS
−
60
87
0
−
−
90
3
2.3
200
92
5
V
mV
%
%
(Note 7)
I
OUTMAX
I
LIM
2.0
2.3
−
2.8
−
3.3
A
A
V
IN
= 3.6 V, I
OUT
from 200 mA to
I
OUTMAX
, (Note 7)
I
OUT
= 200 mA, V
IN
from MAX(V
NOM
+
0.5 V, 2.3 V) to 5.5 V (Note 7)
(Note 7)
D
MAX
(Note 7)
V
OUT
V
FB
0.6
594
−
−
−
−
600
−0.5
0
100
VIN
606
−
−
−
V
mV
%/A
%/V
%
EN high, no load
EN low
I
Q
I
SD
−
−
5
−
−
1
mA
mA
(Note 9)
V
IN
2.3
−
5.5
V
Test Conditions
Symbol
Min
Typ
Max
Unit
Power Good High Delay in Start Up
Power Good Low Delay in Shut Down
Power Good High Delay in Regulation
Td
PGH1
Td
PGL1
Td
PGH
−
−
−
1.15
8
5
−
−
−
ms
ms
ms
Power Good Low Delay in Regulation
Power Good Pin Low Voltage
Power Good Pin Leakage Current
INTEGRATED MOSFETs
High−Side MOSFET ON Resistance
Low−Side MOSFET ON Resistance
SWITCHING FREQUENCY
Operation Frequency
Td
PGL
VPG_L
PG_LK
−
−
−
8
−
−
−
0.3
100
ms
V
nA
V
IN
= 3.6 V (Note 8)
V
IN
= 5 V (Note 8)
V
IN
= 3.6 V (Note 8)
V
IN
= 5 V (Note 8)
R
ON_H
R
ON_L
−
−
140
130
110
100
200
−
140
−
mW
mW
FSW
2.7
3.0
3.3
MHz
7. Guaranteed by design, not tested in production.
8. Maximum value applies for T
J
= 85°C.
9. Operation above 5.5 V input voltage for extended periods may affect device reliability.
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4
NCP6354
ELECTRICAL CHARACTERISTICS
(V
IN
= 3.6 V, V
OUT
= 1.8 V, L = 1
mH,
C = 10
mF,
typical values are referenced to T
J
= 25°C, Min and Max values are referenced to T
J
up to
125°C. unless other noted.)
Characteristics
SOFT START
Soft−Start Time
CONTROL LOGIC
EN Input High Voltage
EN Input Low Voltage
EN Input Hysteresis
Enable Input Bias Current
OUTPUT ACTIVE DISCHARGE
Internal Output Discharge Resistance
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
TSD
TSD_HYS
−
−
150
25
−
−
°C
°C
from SW to PGND
R_DIS
75
500
700
W
VEN_H
VEN_L
VEN_HYS
IEN_BIAS
1.1
−
−
−
−
270
0.1
−
0.4
−
1
V
V
mV
mA
Time from EN to 90% of output voltage
target
TSS
−
0.4
1
ms
Test Conditions
Symbol
Min
Typ
Max
Unit
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