MUN5230DW1,
NSBC113EDXV6
Dual NPN Bias Resistor
Transistors
R1 = 1 kW, R2 = 1 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
(3)
R
1
Q
1
Q
2
R
2
(4)
(5)
R
1
(6)
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PIN CONNECTIONS
(2)
R
2
(1)
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25C, common for Q
1
and Q
2
, unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
−
Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
10
10
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
MARKING DIAGRAMS
6
SOT−363
CASE 419B
1
7G M
G
G
SOT−563
CASE 463A
1
7G
M
G
7G M
G
G
= Specific Device Code
= Date Code*
= Pb-Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
MUN5230DW1T1G,
SMUN5230DW1T1G
NSBC113EDXV6T1G
Package
SOT−363
SOT−563
Shipping
†
3,000/Tape & Reel
4,000/Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2012
September, 2012
−
Rev. 0
1
Publication Order Number:
DTC113ED/D
MUN5230DW1, NSBC113EDXV6
THERMAL CHARACTERISTICS
Characteristic
MUN5230DW1 (SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
MUN5230DW1 (SOT−363) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
NSBC113EDXV6 (SOT−563) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
NSBC113EDXV6 (SOT−563) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
Junction and Storage Temperature Range
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0
1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
(Note 1)
(Note 1)
(Note 1)
P
D
500
4.0
250
−55
to +150
mW
mW/C
C/W
C
(Note 1)
(Note 1)
(Note 1)
P
D
357
2.9
350
mW
mW/C
C/W
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
250
385
2.0
3.0
493
325
188
208
−55
to +150
mW
mW/C
C/W
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
187
256
1.5
2.0
670
490
mW
mW/C
C/W
Symbol
Max
Unit
R
qJA
R
qJA
R
qJL
C/W
T
J
, T
stg
C
R
qJA
R
qJA
T
J
, T
stg
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2
MUN5230DW1, NSBC113EDXV6
ELECTRICAL CHARACTERISTICS
(T
A
= 25C, common for Q
1
and Q
2
, unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(V
CB
= 50 V, I
E
= 0)
Collector-Emitter Cutoff Current
(V
CE
= 50 V, I
B
= 0)
Emitter-Base Cutoff Current
(V
EB
= 6.0 V, I
C
= 0)
Collector-Base Breakdown Voltage
(I
C
= 10
mA,
I
E
= 0)
Collector-Emitter Breakdown Voltage (Note 4)
(I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS
DC Current Gain (Note 4)
(I
C
= 5.0 mA, V
CE
= 10 V)
Collector-Emitter Saturation Voltage (Note 4)
(I
C
= 10 mA, I
B
= 5.0 mA)
Input Voltage (Off)
(V
CE
= 5.0 V, I
C
= 100
mA)
Input Voltage (On)
(V
CE
= 0.2 V, I
C
= 20 mA)
Output Voltage (On)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
Output Voltage (Off)
(V
CC
= 5.0 V, V
B
= 0.05 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
4. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle
2%.
h
FE
V
CE(sat)
V
i(off)
V
i(on)
V
OL
V
OH
R1
R
1
/R
2
3.0
−
−
−
−
4.9
0.7
0.8
5.0
−
1.2
1.7
−
−
1.0
1.0
−
0.25
−
−
0.2
−
1.3
1.2
V
Vdc
Vdc
Vdc
Vdc
kW
I
CBO
I
CEO
I
EBO
V
(BR)CBO
V
(BR)CEO
−
−
−
50
50
−
−
−
−
−
100
500
4.3
−
−
nAdc
nAdc
mAdc
Vdc
Vdc
Symbol
Min
Typ
Max
Unit
400
P
D
, POWER DISSIPATION (mW)
350
300
250
200
150
100
50
0
−50
−25
0
25
50
75
100
125
150
(1) (2)
(1) SOT−363; 1.0
1.0 Inch Pad
(2) SOT−563; Minimum Pad
AMBIENT TEMPERATURE (C)
Figure 1. Derating Curve
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3
MUN5230DW1, NSBC113EDXV6
TYPICAL CHARACTERISTICS
MUN5230DW1, NSBC113EDXV6
V
CE(sat)
, COLLECTOR−EMITTER VOLTAGE (V)
10
100
V
CE
= 10 V
h
FE
, DC CURRENT GAIN
25C
10
150C
−55C
I
C
/I
B
= 10
1
25C
0.1
150C
−55C
1
0.01
0
30
10
40
20
I
C
, COLLECTOR CURRENT (mA)
50
0.1
0.1
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 2. V
CE(sat)
vs. I
C
Figure 3. DC Current Gain
3.6
C
ob
, OUTPUT CAPACITANCE (pF)
I
C
, COLLECTOR CURRENT (mA)
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
0
10
20
30
40
V
R
, REVERSE VOLTAGE (V)
50
f = 10 kHz
I
E
= 0 A
T
A
= 25C
100
150C
10
25C
−55C
1
V
O
= 5 V
0.1
0
0.5
1.0
1.5
2.0
V
in
, INPUT VOLTAGE (V)
2.5
3.0
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
V
in
, INPUT VOLTAGE (V)
10
25C
−55C
150C
V
O
= 0.2 V
0.1
1
0
10
20
30
40
I
C
, COLLECTOR CURRENT (mA)
50
Figure 6. Input Voltage vs. Output Current
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4
MUN5230DW1, NSBC113EDXV6
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE W
D
e
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B−01 OBSOLETE, NEW STANDARD 419B−02.
DIM
A
A1
A3
b
C
D
E
e
L
H
E
MILLIMETERS
MIN
NOM MAX
0.80
0.95
1.10
0.00
0.05
0.10
0.20 REF
0.10
0.21
0.30
0.10
0.14
0.25
1.80
2.00
2.20
1.15
1.25
1.35
0.65 BSC
0.10
0.20
0.30
2.00
2.10
2.20
INCHES
NOM MAX
0.037 0.043
0.002 0.004
0.008 REF
0.004 0.008 0.012
0.004 0.005 0.010
0.070 0.078 0.086
0.045 0.049 0.053
0.026 BSC
0.004 0.008 0.012
0.078 0.082 0.086
MIN
0.031
0.000
6
5
4
H
E
1
2
3
−E−
b
6 PL
0.2 (0.008)
M
E
M
A3
C
A
A1
L
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm
inches
SC−88/SC70−6/SOT−363
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
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