NLAS5223C, NLAS5223CL
Ultra-Low 0.35
W
Dual SPDT Analog Switch
The NLAS5223C is an advanced CMOS analog switch fabricated in
Sub−micron silicon gate CMOS technology. The device is a dual
Independent Single Pole Double Throw (SPDT) switch featuring
Ultra−Low R
ON
of 0.35
W,
at V
CC
= 4.3 V.
The part also features guaranteed Break Before Make (BBM)
switching, assuring the switches never short the driver.
Features
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MARKING
DIAGRAM
UQFN10
CASE 488AT
1
XX
M
G
•
•
•
•
•
•
•
•
•
•
Ultra−Low R
ON
, 0.35
W
(typ) at V
CC
= 4.3 V
NLAS5223C Interfaces with 2.8 V Chipset
NLAS5223CL Interfaces with 1.8 V Chipset
Single Supply Operation from 1.65−4.5 V
Full 0−V
CC
Signal Handling Capability
High Off−Channel Isolation
Low Standby Current,
t50
nA
Low Distortion
R
ON
Flatness of 0.15
W
High Continuous Current Capability
♦
±320
mA Through Each Switch
•
Large Current Clamping Diodes at Analog Inputs
♦
±100
mA Continuous Current Capability
•
Package:
♦
1.4 x 1.8 x 0.55 mm UQFN10 Pb−Free
•
These are Pb−Free Devices
Applications
XXMG
G
= Specific Device Code
= Date Code/Assembly Location
= Pb−Free Device
(Note: Microdot may be in either location)
NC2
7
GND
6
IN2
8
5
NC1
COM2
9
4
IN1
NO2
10
3
COM1
•
•
•
•
Cell Phone Audio Block
Speaker and Earphone Switching
Ring−Tone Chip/Amplifier Switching
Modems
IN 1, 2
0
1
1
V
CC
2
NO1
FUNCTION TABLE
NO 1, 2
OFF
ON
NC 1, 2
ON
OFF
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 9 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
September, 2015 − Rev. 2
Publication Order Number:
NLAS5223C/D
NLAS5223C, NLAS5223CL
COM
NO
NC
IN
Figure 1. Logic Equivalent Circuit
PIN DESCRIPTION
QFN PIN #
2, 5, 7, 10
4, 8
3, 9
6
1
Symbol
NC1 to NC2, NO1 to NO2
IN1 and IN2
COM1 and COM2
GND
V
CC
Independent Channels
Controls
Common Channels
Ground (V)
Positive Supply Voltage
Name and Function
MAXIMUM RATINGS
Symbol
V
CC
V
IS
V
IN
I
anl1
I
anl−pk1
I
anl−pk2
I
clmp
ESD
Positive DC Supply Voltage
Analog Input Voltage (V
NO
, V
NC
, or V
COM
)
Digital Select Input Voltage
Continuous DC Current from COM to NC/NO
Peak Current from COM to NC/NO, 10% Duty Cycle, 100 ms = t
ON
(Note 1)
Instantaneous Peak Current from COM to NC/NO, 10% Duty Cycle, t
ON
< 1
ms
Continuous DC Current into COM/NO/NC with Respect to V
CC
or GND
ESD Withstand Voltage
Human Body Model (HBM)
Parameter
Value
−0.5 to +7.0
−0.5
v
V
IS
v
V
CC
+ 0.5
−0.5
v
V
IN
v
+5.5
±320
±600
±850
±100
>3000
Unit
V
V
V
mA
mA
mA
mA
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Defined as 10% ON, 90% OFF Duty Cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
IS
T
A
t
r
, t
f
DC Supply Voltage
Digital Select Input Voltage (OVT) Overvoltage Tolerance
Analog Input Voltage (NC, NO, COM)
Operating Temperature Range
Input Rise or Fall Time, SELECT
V
CC
= 1.6 V − 2.7 V
V
CC
= 3.0 V − 4.5 V
Parameter
Min
1.65
GND
GND
−40
Max
4.5
4.5
V
CC
+85
20
10
Unit
V
V
V
°C
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
NLAS5223C, NLAS5223CL
NLAS5223C DC CHARACTERISTICS − DIGITAL SECTION
(Voltages Referenced to GND)
Guaranteed Limit
Symbol
V
IH
V
IL
I
IN
I
OFF
I
CC
Parameter
Minimum High−Level Input Voltage, Select
Inputs
Maximum Low−Level Input Voltage, Select
Inputs
Maximum Input Leakage Current, Select
Inputs
Power Off Leakage Current
Maximum Quiescent Supply Current
(Note 2)
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND
Select and V
IS
= V
CC
or GND
Condition
V
CC
3.0
4.3
3.0
4.3
4.3
0
1.65 to 4.5
25°C
1.4
2.0
0.7
0.8
±0.1
±0.5
±1.0
−40°C
to +85°C
1.4
2.0
0.7
0.8
±1.0
±2.0
±2.0
Unit
V
V
mA
mA
mA
2. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
NLAS5223C DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION
Guaranteed Maximum Limit
25°C
Symbol
R
ON
Parameter
NC/NO On−Resistance
(Note 3)
NC/NO On−Resistance Flatness
(Notes 3 and 4)
On−Resistance Match Between Channels
(Notes 3 and 5)
Condition
V
IN
= V
IL
or V
IN
= V
IH
V
IS
= GND to V
CC
I
COM
= 100 mA
I
COM
= 100 mA
V
IS
= 0 to V
CC
V
IS
= 1.5 V;
I
COM
= 100 mA
V
IS
= 2.2 V;
I
COM
= 100 mA
V
IN
= V
IL
or V
IH
V
NO
or V
NC
= 0.3 V
V
COM
= 4.0 V
V
IN
= V
IL
or V
IH
V
NO
0.3 V or 4.0 V with
V
NC
floating or
V
NC
0.3 V or 4.0 V with
V
NO
floating
V
COM
= 0.3 V or 4.0 V
V
CC
3.0
4.3
3.0
4.3
3.0
4.3
4.3
−5.0
Min
Max
0.4
0.35
0.16
0.11
0.05
0.05
5.0
−50
−40°C to
+85°C
Min
Max
0.5
0.4
0.20
0.14
0.05
0.05
50
nA
Unit
W
R
FLAT
DR
ON
W
W
I
NC(OFF)
I
NO(OFF)
I
COM(ON)
NC or NO Off Leakage Current (Note 3)
COM ON
Leakage Current
(Note 3)
4.3
−10
10
−100
100
nA
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
4. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog
signal ranges.
5.
DR
ON =
R
ON(MAX)
− R
ON(MIN)
between NC1 and NC2 or between NO1 and NO2.
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3
NLAS5223C, NLAS5223CL
NLAS5223CL DC CHARACTERISTICS − DIGITAL SECTION
(Voltages Referenced to GND)
Guaranteed Limit
Symbol
V
IH
V
IL
I
IN
I
OFF
I
CC
I
CCV
Parameter
Minimum High−Level Input Voltage, Select
Inputs
Maximum Low−Level Input Voltage, Select
Inputs
Maximum Input Leakage Current, Select
Inputs
Power Off Leakage Current
Maximum Quiescent Supply Current
Maximum Quiescent Supply Current, Low
Voltage Driving (Note 6)
V
IN
= 4.5 V or GND
V
IN
= 4.5 V or GND
Select and V
IS
= V
CC
or GND
V
IS
= V
CC
or GND
V
IN
= 1.65 V
V
IS
= V
CC
or GND
V
IN
= 1.80 V
V
IS
= V
CC
or GND
V
IN
= 2.60 V
6. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
Condition
V
CC
3.0
4.3
3.0
4.3
4.3
0
1.65 to 4.5
4.3
25°C
1.3
1.6
0.5
0.6
±0.1
±0.5
±1.0
±145
±125
±50
−40°C
to +85°C
1.3
1.6
0.5
0.6
±1.0
±2.0
±2.0
±150
±130
±55
Unit
V
V
mA
mA
mA
mA
NLAS5223CL DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION
Guaranteed Maximum Limit
25°C
Symbol
R
ON
Parameter
NC/NO On−Resistance
(Note 7)
NC/NO On−Resistance Flatness
(Notes 7 and 8)
On−Resistance Match Between Channels
(Notes 7 and 9)
Condition
V
IN
= V
IL
or V
IN
= V
IH
V
IS
= GND to V
CC
I
COM
= 100 mA
I
COM
= 100 mA
V
IS
= 0 to V
CC
V
IS
= 1.5 V;
I
COM
= 100 mA
V
IS
= 2.2 V;
I
COM
= 100 mA
V
IN
= V
IL
or V
IH
V
NO
or V
NC
= 0.3 V
V
COM
= 4.0 V
V
IN
= V
IL
or V
IH
V
NO
0.3 V or 4.0 V with
V
NC
floating or
V
NC
0.3 V or 4.0 V with
V
NO
floating
V
COM
= 0.3 V or 4.0 V
V
CC
3.0
4.3
3.0
4.3
3.0
4.3
4.3
−10
Min
Max
0.4
0.35
0.16
0.11
0.05
0.05
10
−100
−40°C to
+85°C
Min
Max
0.5
0.4
0.20
0.14
0.05
0.05
100
nA
Unit
W
R
FLAT
DR
ON
W
W
I
NC(OFF)
I
NO(OFF)
I
COM(ON)
NC or NO Off Leakage Current (Note 7)
COM ON
Leakage Current
(Note 7)
4.3
−10
10
−100
100
nA
7. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
8. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog
signal ranges.
9.
DR
ON =
R
ON(MAX)
− R
ON(MIN)
between NC1 and NC2 or between NO1 and NO2.
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4
NLAS5223C, NLAS5223CL
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns)
Guaranteed Maximum Limit
V
CC
(V)
2.3 − 4.5
2.3 − 4.5
V
IS
(V)
1.5
1.5
25°C
Min
Typ*
Max
50
30
−40°C to
+85°C
Min
Max
60
40
Unit
ns
ns
ns
3.0
1.5
2
15
Symbol
t
ON
t
OFF
t
BBM
Parameter
Turn−On Time
Turn−Off Time
Minimum Break−Before−Make
Time
Test Conditions
R
L
= 50
W,
C
L
= 35 pF
(Figures 3 and 4)
R
L
= 50
W,
C
L
= 35 pF
(Figures 3 and 4)
V
IS
= 3.0
R
L
= 50
W,
C
L
= 35 pF
(Figure 2)
Typical @ 25, V
CC
= 3.6 V
C
IN
C
NO/NC
C
COM
Control Pin Input Capacitance
NO, NC Port Capacitance
COM Port Capacitance When Switch is Enabled
3.5
60
200
pF
pF
pF
*Typical Characteristics are at 25°C.
ADDITIONAL APPLICATION CHARACTERISTICS
(Voltages Referenced to GND Unless Noted)
V
CC
(V)
1.65 − 4.5
25°C
Typical
24
Unit
MHz
Symbol
BW
Parameter
Maximum On−Channel −3 dB
Bandwidth or Minimum
Frequency Response
Maximum Feed−through On Loss
Off−Channel Isolation
Charge Injection Select Input to
Common I/O
Total Harmonic Distortion
THD + Noise
Channel−to−Channel Crosstalk
Condition
V
IN
centered between V
CC
and GND
(Figure 5)
V
IN
= 0 dBm @ 100 kHz to 50 MHz
V
IN
centered between V
CC
and GND (Figure 5)
f = 100 kHz; V
IS
= 1 V RMS; C
L
= 5.0 pF
V
IN
centered between V
CC
and GND (Figure 5)
V
IN =
V
CC to
GND, R
IS
= 0
W,
C
L
= 1.0 nF
Q = C
L
x DV
OUT
(Figure 6)
F
IS
= 20 Hz to 20 kHz, R
L
= R
gen
= 600
W,
C
L
= 50 pF
V
IS
= 2.0 V RMS
f = 100 kHz; V
IS
= 1.0 V RMS, C
L
= 5.0 pF, R
L
= 50
W
V
IN
centered between V
CC
and GND (Figure 5)
V
ONL
V
ISO
Q
THD
VCT
1.65 − 4.5
1.65 − 4.5
1.65 − 4.5
3.0
1.65 − 4.5
−0.06
−68
38
0.08
−70
dB
dB
pC
%
dB
10. Off−Channel Isolation = 20log10 (V
COM
/V
NO
), V
COM
= output, V
NO
= input to off switch.
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