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MUN5111T1_10

产品描述Bias Resistor Transistors
文件大小143KB,共13页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
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MUN5111T1_10概述

Bias Resistor Transistors

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MUN5111T1 Series
Bias Resistor Transistors
PNP Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space. The device is housed in
the SC−70/SOT−323 package which is designed for low power
surface mount applications.
Features
http://onsemi.com
PNP SILICON
BIAS RESISTOR
TRANSISTORS
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SC−70/SOT−323 package can be soldered using wave or reflow.
The modified gull−winged leads absorb thermal stress during
soldering eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel
Use the Device Number
to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the
Device Number to order the 13 inch/10,000 unit reel.
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
PIN 1
BASE
(INPUT)
R
1
R
2
3
1
2
SC−70/SOT−323
CASE 419
STYLE 3
MARKING DIAGRAM
6x M
G
G
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Lead
Junction and Storage Temperature
Range
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
©
Semiconductor Components Industries, LLC, 2010
Symbol
P
D
Max
202 (Note 1)
310 (Note 2)
1.6 (Note 1)
2.5 (Note 2)
618 (Note 1)
403 (Note 2)
280 (Note 1)
332 (Note 2)
−55
to +150
Unit
mW
°C/W
°C/W
°C/W
°C
6x = Device Code
M = Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
See specific ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
R
qJA
R
qJL
T
J
, T
stg
October, 2010
Rev. 10
1
Publication Order Number:
MUN5111T1/D
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