19-5327; Rev 2; 1/12
System Management Microcontroller
General Description
The MAX31782 provides a complete solution for the
monitoring and controlling of complex system physical
health characteristics based on a high-performance,
MAXQ20, 16-bit microcontroller core with generous
amounts of flash program/data and RAM data memory.
I/O resources include an accurate measurement sys-
tem for temperature and voltage, PWM outputs, timer
inputs, and GPIO to support monitoring and controlling
critical system parameters such as temperature, volt-
age, fan speed, and chassis intrusion. Direct connection
of diode-connected transistors used as remote tem-
perature sensors is supported as well as expansion to a
virtually unlimited number of external digital temperature
sensor ICs using the on-chip master I
2
C interface. An
independent slave I
2
C interface facilitates communica-
tion to a host microprocessor in addition to password-
protected in-system reprogramming of the on-chip flash.
Ease of development is supported with highly versatile
C-compilers and development software that programs
flash and performs in-circuit debug through the inte-
grated JTAG interface and associated hardware.
All these features combined make the device a highly
flexible platform, allowing the designer to easily create a
customized complex system management solution.
S
Efficient C-Language Programming
S
36KWords Total Program Memory
32KWords Flash Program Memory
4KWords ROM Program Memory
S
1KWords Data RAM
S
12-Bit ADC with 7-Input Mux for Temperature and
Voltage Monitoring
S
Temperature Measurement Analog Front-End
0.125NC Resolution
Diode Series Resistance Cancellation
S
Six Timer/Fan Tachometer Inputs
S
Six 16-Bit PWM Outputs for Fan Speed or D/A
Applications
S
5-Bit GPIO Ports
S
SMBus/I
2
C-Compatible Slave Interface for Host
Communication with Password-Protected Flash
Programming
S
I
2
C-Compatible Master Interface for Slave
Expansion
S
Power-On Reset and Brownout Monitors
S
JTAG Port Supports In-System Debug and Flash
Programming
S
Internal Oscillator Requires No Crystal
S
2.7V to 5.5V Operating Voltage Range
Features
S
MAXQ20, High-Performance, 16-Bit µC
MAX31782
Applications
Network Switches/Routers
Base Stations
Servers
Smart Grid Network Systems
Ordering Information
PART
MAX31782ETL+
MAX31782ETL+T
TEMP RANGE
-40NC to +85NC
-40NC to +85NC
PIN-PACKAGE
40 TQFN-EP*
40 TQFN-EP*
Typical Operating Circuit appears at end of data sheet.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*EP
= Exposed pad.
Note:
Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, go to:
www.maxim-ic.com/errata.
_______________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
System Management Microcontroller
MAX31782
ABSOLUTE MAXIMUM RATINGS
V
DD
to V
SS
...........................................................-0.5V to +5.5V
ADxN to V
SS
.........................................................-0.3V to +0.3V
All Other Pins to V
SS
except
REG18 and REG25.............................. -0.5V to (V
DD
+ 0.5V)*
SCL, SDA, MSDA, MSCL, P6.0–P6.4
Continuous Sink Current.................... 20mA each, 50mA total
P6.0–P6.4 Continuous Source Current ...20mA each, 50mA total
*Subject
to not exceeding +5.5V.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range............................ -55NC to +125NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Continuous Power Dissipation (T
A
= +70NC)
TQFN (derate 35.7mW/NC above +70NC)...............2857.1mW
RECOMMENDED OPERATING CONDITIONS
(T
A
= -40NC to +85NC, unless otherwise noted.)
PARAMETER
V
DD
Operating Voltage Range
Input Logic 1
Input Logic 0
SYMBOL
V
DD
V
IH
V
IL
2.7V
P
V
DD
P
3.6V (Note 1)
Input Logic-High: SCL, SDA,
MSDA, MSCL
V
I2C_IH
3.6V
P
V
DD
P
5.5V
2.7V
P
V
DD
P
3.6V (Note 1)
V
I2C_IL
3.6V
P
V
DD
P
5.5V
(Note 1)
CONDITIONS
MIN
2.7
0.7 x
V
DD
0
2.1
0.7 x
V
DD
0
0
TYP
MAX
5.5
V
DD
+
0.3
0.3 x
V
DD
V
DD
+
0.3
V
DD
+
0.3
0.8
0.3 x
V
DD
V
V
UNITS
V
V
V
Input Logic-Low: SCL, SDA,
MSDA, MSCL
DC ELECTRICAL CHARACTERISTICS
(V
DD
= 2.7V to 5.5V, T
A
= -40NC to +85NC, unless otherwise noted. Typical values are at V
DD
= 3.3V, T
A
= +25NC, unless otherwise
noted.)
PARAMETER
Supply Current
Brownout Voltage
Brownout Hysteresis
Internal System Clock
System Clock Error (Note 3)
SYMBOL
I
CPU
I
STOP
I
PROGRAM
V
BO
V
BOH
f
MOSC
Initial tolerance, T
A
= +25NC, V
DD
= 5.5V
f
ERR:MOSC
+25NC
P
T
A
P
+85NC
-40NC
P
T
A
P
+25NC
-1
-2
-5.5
Monitors V
DD
(Note 1)
Monitors V
DD
(Note 1)
2.40
(Note 2)
CONDITIONS
Assuming 100% CPU duty cycle (Note 2)
MIN
TYP
1.73
830
7
2.46
30
4.0
+1
+1
+0.6
%
2.55
MAX
2.34
1250
UNITS
mA
µA
mA
V
mV
MHz
2
System Management Microcontroller
DC ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 2.7V to 5.5V, T
A
= -40NC to +85NC, unless otherwise noted. Typical values are at V
DD
= 3.3V, T
A
= +25NC, unless otherwise
noted.)
PARAMETER
System Clock Startup
Output Logic-Low
Output Logic-High (all pins
except SDA, SLL, MSDA, MSCL)
GPIO Mode Pullup Current
ADC Voltage Conversion Time
ADC Temperature Conversion
Time
ADC Internal Reference
ADC Voltage Measurement Error
ADC Internal Reference
Temperature Drift
ADC Internal Reference Initial
Accuracy (+25NC)
ADC External Reference Buffer
Accuracy
ADC Operating Current
ADC Full-Scale Input Voltage
(Note 6)
ADC Measurement Resolution
ADC Bit Resolution
AD0P–AD5P Input Resistance
ADC Integral Nonlinearity
ADC Offset
Internal Temperature
Measurement Error
R
IN
INL
V
OFFSET
T
A
= -40NC to +85NC
T
A
= 0NC to +60NC,
T
DIODE
= +60NC to +120NC
Remote Temperature
Measurement Error
(MAX31782 Error Only)
T
A
= 0NC to +60NC,
T
DIODE
= -45NC to +120NC
T
A
= -40NC to +85NC,
T
DIODE
= +60 to +120NC
T
A
= -40NC to +85NC,
T
DIODE
= -45NC to +120NC
-3
-1.5
-1.75
-2.75
-3.0
(Note 7)
Q2
+3
+1.5
+1.75
NC
+2.75
+3.0
I
ADC
V
FS
V
LSB
(Note 5)
This current is in addition to I
CPU
ADGAIN = 0, factory set, internal reference
ADGAIN = 1, factory set, internal reference
ADGAIN = 0
ADGAIN = 1
12
15
Q8
1.213
5.445
1.225
5.5
300
1343
V
ERR
-1
-0.5
-1
Q0.25
2.2
1.237
5.555
SYMBOL
t
SU:MOSC
V
OL
V
OH
I
PU
t
CONV_V
t
CONV_T
CONDITIONS
From POR, MOSC inactive
I
OL
= 4mA (Note 1)
I
OH
= -2mA (Note 1)
V
PIN
= V
SS,
V
DD
= 3.3V
(Note 4)
(Note 4)
1.225
+1
+0.5
+1
V
DD
-
0.5
38
55
137
107
150
7
MIN
TYP
1000
0.4
MAX
UNITS
MOSC
Cycles
V
V
FA
µs
ms
V
%
%
mV
%
mA
V
FV
Bits
MI
LSB
LSB
NC
MAX31782
3
System Management Microcontroller
MAX31782
DC ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 2.7V to 5.5V, T
A
= -40NC to +85NC, unless otherwise noted. Typical values are at V
DD
= 3.3V, T
A
= +25NC, unless otherwise
noted.)
PARAMETER
Flash Erase Time
Flash Programming Time per
Word
Flash Endurance
Data Retention
SYMBOL
t
ME
t
PE
t
PROG
N
FLASH
T
A
= +50NC
T
A
= +50NC
Mass erase
Page erase
CONDITIONS
MIN
20
20
20
20,000
100
TYP
MAX
40
40
40
UNITS
ms
Fs
Write
Cycles
Years
ELECTRICAL CHARACTERISTICS: I
2
C-COMPATIBLE INTERFACE
(V
DD
= 2.7V to 5.5V, T
A
= -40NC to +85NC, unless otherwise noted.) (Figure 1)
PARAMETER
SCL Clock Frequency
Bus Free Time Between a STOP
and START Condition
Hold Time (Repeated)
START Condition
Low Period of SCL Clock
High Period of SCL Clock
Setup Time for a (Repeated)
START Condition
Data Hold Time (Note 10)
Data Setup Time
Rise Time of Both SDA and
SCL Signals
Fall Time of Both SDA and
SCL Signals
Setup Time for STOP
Condition
Spike Pulse Width That Can Be
Suppressed by Input Filter
SCL, SDA Capacitive Loading
SMBus Timeout
SYMBOL
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
SP
C
B
25
30
(Note 12)
(Note 11)
(Note 11)
Receive
Transmit
(Note 9)
CONDITIONS
Timeout not enabled (Note 8)
MIN
10
1.3
0.6
1.3
0.6
0.6
0
300
100
20 +
0.1C
B
20 +
0.1C
B
0.6
0
50
400
35
300
300
TYP
MAX
400
UNITS
kHz
Fs
Fs
Fs
Fs
Fs
ns
ns
ns
ns
Fs
ns
pF
ms
4
System Management Microcontroller
ELECTRICAL CHARACTERISTICS: JTAG INTERFACE
(V
DD
= 2.7V to 5.5V, T
A
= -40NC to +85NC, unless otherwise noted.) (Figure 2)
PARAMETER
JTAG Logic Reference
TCK High Time
TCK Low Time
TCK Low to TDO Output
TMS, TDI Input Setup to TCK
High
TMS, TDI Input Hold after TCK
High
SYMBOL
V
REF
t
TH
t
TL
t
TLQ
t
DVTH
t
THDX
0.30
0.25
1
1
0.125
CONDITIONS
MIN
TYP
V
DD
/2
MAX
UNITS
V
Fs
Fs
Fs
Fs
Fs
MAX31782
Note 1:
All voltages are referenced to ground (V
SS
). Currents entering the IC are specified positive and currents exiting the IC are
negative.
Note 2:
This value does not include current in SDA, SCL, and P6.0–P6.4.
Note 3:
Guaranteed by design.
Note 4:
ADCCLK = SYSCLK/16. This is following an initial startup time of approximately 80µs.
Note 5:
Base line accuracy of reference source + 0.25% introduced by the MAX31782.
Note 6:
The voltage applied to the pins must not exceed their corresponding absolute maximum voltages.
Note 7:
ADC has no missing codes.
Note 8:
Minimum SCL frequency applies only when in I
2
C master mode.
Note 9:
After this period, the first clock pulse can be generated.
Note 10:
This device internally provides a hold time of at least 25ns for the SDA signal (referenced to the V
IHMIN
of the SCL signal)
to bridge the undefined region of the falling edge of SCL.
Note 11:
C
B
—Total capacitance of one bus line in pF.
Note 12:
Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
SDA
t
BUF
t
LOW
SCL
t
HIGH
t
HD:DAT
STOP
START
t
SU:DAT
REPEATED
START
t
F
t
HD:STA
t
SP
t
HD:STA
t
R
t
SU:STA
t
SU:STO
NOTE:
TIMING IS REFERENCED TO V
ILMAX
AND V
IHMIN
.
Figure 1. I
2
C-Compatible Bus Timing Diagram
5
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