AN10580
GreenChip TEA1761 synchronous rectification and feedback
controller
Rev. 01 — 19 March 2008
Application note
Document information
Info
Keywords
Abstract
Content
GreenChip SR, TEA1761, Synchronous rectification, high efficiency,
flyback, voltage regulation
The TEA1761 is a member of the new generation of synchronous rectifier
controller ICs for switched mode power supplies. Its high level of
integration allows the design of a cost effective power supply with a very
low number of external components.
The TEA1761 is a controller IC dedicated for synchronous rectification on
the secondary side of discontinuous conduction mode and quasi-resonant
flyback converters. Besides electronics for synchronous rectification,
circuitry for output voltage and output current regulation is integrated.
The TEA1761 is fabricated in a Silicon On Insulator (SOI) process. This
NXP SOI process makes a wide voltage range possible.
NXP Semiconductors
AN10580
GreenChip TEA1761 SR and feedback controller
Revision history
Rev
Rev. 01
Date
20080319
Description
First edition
Contact information
For more information, please visit:
http://www.nxp.com
For sales office addresses, please send an email to:
salesaddresses@nxp.com
AN10580_1
© NXP B.V. 2008. All rights reserved.
Application note
Rev. 01 — 19 March 2008
2 of 11
NXP Semiconductors
AN10580
GreenChip TEA1761 SR and feedback controller
1. Introduction
The TEA1761 is a controller for synchronous rectification, to be used in quasi-resonant
and discontinuous conduction mode flyback converters. Besides control of the SR
MOSFET, the TEA1761 contains the voltage reference and amplifiers to regulate and
control the output voltage and output current of the power supply.
2. Application schematic TEA1761
Figure 1
shows a typical synchronous rectification application using the TEA1761.
2
4
R18
C8
R19
T1
9, 10
R30
V OUT
R32
C39
R41
1
7, 8
1
U2−2
R31
C31
C36
C37
C38
2
U3
D3
8
V
CC
VSENSE
n.c.
ISENSE
6
3
7
R33
1
2
5
OPTO
Q2
C9
SRSENSE DRIVER
1
R34
GND
2
4
R15
R35
R36
R37
R42
Q3
R40
Q4
R38
C33
C35
R39
GND
C34
014aaa051
Fig 1.
Example of the TEA1761 in a 90 W adapter
See
Table 1
in
Section 6.2
for the component values, which are relevant to the
application’s behavior.
3. Functional description and application
3.1 SR control
The TEA1761 uses the SRSENSE pin as an input to control the MOSFETs.
There is no adjustment necessary for the SR control.
AN10580_1
© NXP B.V. 2008. All rights reserved.
Application note
Rev. 01 — 19 March 2008
3 of 11
NXP Semiconductors
AN10580
GreenChip TEA1761 SR and feedback controller
The SR MOSFET is switched on when the voltage at the SRSENSE pin is
lower than
−310
mV.
When the voltage at the SRSENSE pin reaches –55 mV (I
D
×
R
DSon
), the driver decreases
and regulates the gate voltage of the MOSFET in order to maintain the –55 mV at the
SRSENSE pin.
When the voltage at the SRSENSE pin rises above
−12
mV (typical), the SR MOSFET is
switched off.
The synchronous rectification remains active in standby-mode, as long as the secondary
stroke is less than 2
μs
(typical). The driver of the TEA1761 has been designed such that
there is no additional power consumption in standby with the MOSFET active.
For the best performance it is advisable to connect the SRSENSE pin as close as
possible to the drain of the MOSFETs. Also see
Section 6.1.
It is not necessary to place a resistor between the driver output and the MOSFET gate. If
such a series resistor is required, e.g. for reasons of reducing switching noise, then it must
be checked if the SR MOSFET is kept off under all circumstances, especially at high
temperature of the SR MOSFET. At switch-on of the primary side MOSFET, the voltage at
the drain of the SR MOSFET goes up with a high
ΔV/Δt.
The steep
ΔV/Δt
causes a current
flow through the C
dg
capacitor, from gate to drain. This current increases the gate voltage
of the MOSFET. If this rises above the threshold voltage, V
th(en)
, the SR MOSFET is
switched on. This should be prevented.
3.2 Function of resistors in series with pin SRSENSE
In the TEA1761 there is an ESD protection at every pin for handling during production.
Because this ESD protection can still be triggered by an ESD event or test during normal
operation, additional protection by a resistive path is recommended.
If the ESD protection circuit is activated by an external ESD event in the application, then
there will be a short circuit between the SRSENSE pin and GND pin. In this event the IC
could be damaged.
The function of the resistors (R34 and R35 in
Figure 1)
is to limit the current in the
SRSENSE pin if the ESD protection is triggered. A total resistance value of 1 kΩ is
sufficient to protect pin SRSENSE. Because of the peak power rating, two SMD 1206
resistors are used.
3.3 Output voltage regulation
The application of the voltage feedback circuit is similar to well known circuits using a
TL431 or TSM103. The internal reference voltage is 2.5 V, accuracy within 1 %. A voltage
divider (R32 and R33 in
Figure 1)
is used to set the output voltage of the application. The
output voltage can be calculated with the equation:
R
32
+
R
33
-
V
o
=
2.5V
×
----------------------
R
33
Or when V
o
and R32 are known, for example V
o
= 19.5 V and R32 = 35.7 kΩ, then
AN10580_1
© NXP B.V. 2008. All rights reserved.
Application note
Rev. 01 — 19 March 2008
4 of 11
NXP Semiconductors
AN10580
GreenChip TEA1761 SR and feedback controller
R
32
×
V
ref
35.7kΩ
×
2.5V
R
33
=
-------------------------
=
------------------------------------
=
5.25kΩ
⇒
5.23kΩ
(
1%
)
-
(
V
o
–
V
ref
)
(
19.5V
–
2.5V
)
The phase and gain margin of the system can be set with a feedback network between
the OPTO output and the VSENSE pin (R31 and C31 in
Figure 1).
3.4 Output current limit
The output current of the application can be limited by sensing the voltage across a
current-sense resistor (R42 in
Figure 2).
The internal reference voltage of the
current-sense circuit is 50 mV. Therefore the voltage drop across the current-sense
resistor must be more than 50 mV. The resistor divider (R39 and R40 in
Figure 1
and
Figure 2)
is used to adjust the actual output-current limit and to act as an RC filter in
combination with C35.
V OUT +
R30
C34
TEA1761
OPTO
ISENSE
50 mV
C35
R40
R39
GND
R42
V OUT
−
014aaa052
Fig 2.
Output current limit
With the TEA1761 both signals for the voltage feedback and the current feedback are
transferred through one OPTO coupler to the primary side of the application. When an
output overcurrent occurs, the flyback controller at the primary side should limit the output
power. A commonly used method is to do this by triggering the UnderVoltage Lock Out
(UVLO) of the flyback controller.
To trigger the UVLO, three conditions must be met:
1. The tracking of the supply voltage (V
CC
) of the flyback controller must be coupled very
closely to the output voltage. This requires a well designed transformer with a low
leakage inductance and a well designed peak clamp.
2. The output power must be decreased gradually to enable tracking of the flyback V
CC
with the output voltage. To achieve this, the time constant of R40 x C35 should be
approximately 100 ms.
3. The number of turns on the primary side of the auxiliary winding must be kept as low
as possible. This is necessary to trigger the UVLO of the flyback controller before the
UVLO of the TEA1761 is reached.
AN10580_1
© NXP B.V. 2008. All rights reserved.
Application note
Rev. 01 — 19 March 2008
5 of 11
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