BUK7Y53-100B
N-channel TrenchMOS standard level FET
Rev. 02 — 11 February 2010
Objective data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using NXP High-Performance Automotive (HPA) TrenchMOS technology. This
product has been designed and qualified to the appropriate AEC standard for use in
automotive critical applications.
1.2 Features and benefits
Q101 compliant
Suitable for standard level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V, 24 V and 42 V loads
Automotive systems
DC-to-DC converters
Engine management
General purpose power switching
Solenoid drivers
Transmission control
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
Quick reference
Conditions
V
GS
= 10 V; T
mb
= 25 °C;
see
Figure 1
and
3
T
mb
= 25 °C; see
Figure 2
Min
-
-
-
Typ
-
-
-
Max
100
24.8
85
Unit
V
A
W
drain-source voltage T
j
≥
25 °C; T
j
≤
175 °C
drain current
total power
dissipation
gate-drain charge
Symbol Parameter
Dynamic characteristics
Q
GD
I
D
= 10 A; V
DS
= 80 V;
V
GS
= 10 V; see
Figure 15
V
GS
= 10 V; I
D
= 10 A;
T
j
= 25 °C;
see
Figure 12
and
13
I
D
= 24.8 A; V
sup
≤
100 V;
R
GS
= 50
Ω;
V
GS
= 10 V;
T
j(init)
= 25 °C; unclamped
-
8.5
-
nC
Static characteristics
R
DSon
drain-source
on-state resistance
-
40
53
mΩ
Avalanche ruggedness
E
DS(AL)S
non-repetitive
drain-source
avalanche energy
-
-
81
mJ
NXP Semiconductors
BUK7Y53-100B
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
4
mb
c
S
S
G
D
Pinning information
Symbol
Description
source
source
source
gate
mounting base; connected to drain
1 2 3 4
mbb076
Simplified outline
mb
Graphic symbol
D
G
S
SOT669 (LFPAK)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK7Y53-100B
LFPAK
Description
plastic single-ended surface-mounted package (LFPAK); 4 leads
Version
SOT669
Type number
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
T
mb
= 25 °C
t
p
≤
10 µs; pulsed; T
mb
= 25 °C
T
mb
= 25 °C; V
GS
= 10 V; see
Figure 1
and
3
T
mb
= 100 °C; V
GS
= 10 V; see
Figure 1
T
mb
= 25 °C; t
p
≤
10 µs; pulsed; see
Figure 3
T
mb
= 25 °C; see
Figure 2
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
Max
100
100
20
24.8
17.6
99
85
175
175
24.8
99
81
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness
non-repetitive
I
D
= 24.8 A; V
sup
≤
100 V; R
GS
= 50
Ω;
V
GS
= 10 V;
drain-source avalanche T
j(init)
= 25 °C; unclamped
energy
repetitive drain-source
avalanche energy
see
Figure 4
[1][2][3]
E
DS(AL)R
-
-
J
[1]
[2]
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Repetitive avalanche rating limited by an average junction temperature of 170 °C.
BUK7Y53-100B_2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 02 — 11 February 2010
2 of 13
NXP Semiconductors
BUK7Y53-100B
N-channel TrenchMOS standard level FET
[3]
Refer to application note AN10273 for further information.
30
I
D
(A)
003aac515
120
P
der
(%)
80
03na19
20
10
40
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aad637
10
3
I
D
(A)
10
2
Limit R
DSon
= V
DS
/ I
D
t
p
= 10
μs
10
100
μs
1
DC
1 ms
10 ms
100 ms
10
-1
10
-1
1
10
10
2
V
DS
(V)
10
3
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK7Y53-100B_2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 02 — 11 February 2010
3 of 13
NXP Semiconductors
BUK7Y53-100B
N-channel TrenchMOS standard level FET
10
2
I
AL
(A)
10
003aac494
(1)
(2)
1
(3)
10
-1
10
-2
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
Fig 4.
Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
Conditions
Min
-
Typ
-
Max
1.76
Unit
K/W
thermal resistance from see
Figure 5
junction to mounting
base
10
Z
th (j-mb)
(K/W)
δ
= 0.5
0.2
0.1
10
-1
0.05
0.02
P
003aac482
1
δ
=
t
p
T
single shot
10
-2
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
T
t
t
p
(s)
1
Fig 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK7Y53-100B_2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 02 — 11 February 2010
4 of 13
NXP Semiconductors
BUK7Y53-100B
N-channel TrenchMOS standard level FET
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
V
GS(th)
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
see
Figure 10
and
11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
see
Figure 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
see
Figure 10
I
DSS
I
GSS
R
DSon
drain leakage current
gate leakage current
drain-source on-state
resistance
V
DS
= 100 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 100 V; V
GS
= 0 V; T
j
= 175 °C
V
DS
= 0 V; V
GS
= 20 V; T
j
= 25 °C
V
DS
= 0 V; V
GS
= -20 V; T
j
= 25 °C
V
GS
= 10 V; I
D
= 10 A; T
j
= 175 °C;
see
Figure 12
and
13
V
GS
= 10 V; I
D
= 10 A; T
j
= 25 °C;
see
Figure 12
and
13
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GD
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
SD
t
rr
Q
r
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
source-drain voltage
reverse recovery time
recovered charge
I
S
= 15 A; V
GS
= 25 V; T
j
= 25 °C;
see
Figure 14
I
S
= 20 A; dI
S
/dt = -100 A/µs; V
GS
= 0 V;
V
DS
= 30 V
V
DS
= 30 V; R
L
= 3
Ω;
V
GS
= 10 V;
R
G(ext)
= 10
Ω
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
T
j
= 25 °C; see
Figure 16
I
D
= 10 A; V
DS
= 80 V; V
GS
= 10 V;
see
Figure 15
-
-
-
-
-
-
-
-
-
-
-
-
-
22
4.3
8.5
1100
142
63
15.3
7.8
34
7.7
0.85
56
155
-
-
-
1467
170
86
-
-
-
-
1.2
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
ns
nC
Min
100
90
2
-
1
-
-
-
-
-
-
Typ
-
-
3
-
-
0.02
-
2
2
-
40
Max
-
-
4
4.4
-
1
500
100
100
138
53
Unit
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
Static characteristics
Source-drain diode
BUK7Y53-100B_2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 02 — 11 February 2010
5 of 13
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