74HC32; 74HCT32
Quad 2-input OR gate
Rev. 5 — 4 September 2012
Product data sheet
1. General description
The 74HC32; 74HCT32 is a quad 2-input OR gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
.
2. Features and benefits
Wide supply voltage range from 2.0 V to 6.0 V
Complies with JEDEC standard JESD7A
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Input levels:
For 74HC32: CMOS level
For 74HCT32: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +85
C
and from
40 C
to +125
C
NXP Semiconductors
74HC32; 74HCT32
Quad 2-input OR gate
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC32N
74HCT32N
74HC32D
74HCT32D
74HC32DB
74HCT32DB
74HC32PW
74HCT32PW
74HC32BQ
74HCT32BQ
40 C
to +125
C
DHVQFN14
40 C
to +125
C
TSSOP14
40 C
to +125
C
SSOP14
40 C
to +125
C
SO14
plastic small outline package; 14 leads; body width
3.9 mm
plastic shrink small outline package; 14 leads; body
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT108-1
SOT337-1
SOT402-1
40 C
to +125
C
Name
DIP14
Description
plastic dual in-line package; 14 leads (300 mil)
Version
SOT27-1
Type number
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm
4. Functional diagram
1
2
≥1
3
4
1
2
4
5
9
10
12
13
1A
1B
2A
2B
3A
3B
4A
4B
1Y
3
5
≥1
6
2Y
6
9
10
≥1
8
3Y
8
A
12
13
4Y
11
≥1
11
B
Y
mna241
mna242
mna243
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
74HC_HCT32
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 September 2012
2 of 17
NXP Semiconductors
74HC32; 74HCT32
Quad 2-input OR gate
5. Pinning information
5.1 Pinning
terminal 1
index area
1B
1Y
2A
2B
2B
2Y
GND
5
6
7
001aad101
1A
1B
1Y
2A
1
2
3
4
14 V
CC
13 4B
12 4A
2
3
4
5
6
7
GND
3Y
8
14 V
CC
13 4B
12 4A
11 4Y
10 3B
9
3A
32
11 4Y
10 3B
9
8
3A
3Y
GND
(1)
2Y
1
1A
32
001aad102
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 4.
Pin configuration DIP14, SO14 and (T)SSOP14
Fig 5.
Pin configuration DHVQFN14
5.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
Pin description
Pin
1, 4, 9, 12
2, 5, 10,13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
6. Functional description
Table 3.
Input
nA
L
L
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
Function table
[1]
Output
nB
L
H
L
H
nY
L
H
H
H
74HC_HCT32
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 September 2012
3 of 17
NXP Semiconductors
74HC32; 74HCT32
Quad 2-input OR gate
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP14 package
SO14, (T)SSOP14 and
DHVQFN14 packages
[1]
[2]
[2]
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
Min
0.5
-
-
-
-
50
65
-
-
Max
+7
20
20
25
50
-
+150
750
500
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP14 package: P
tot
derates linearly with 12 mW/K above 70
C.
For SO14 package: P
tot
derates linearly with 8 mW/K above 70
C.
For (T)SSOP14 packages: P
tot
derates linearly with 5.5 mW/K above 60
C.
For DHVQFN14 packages: P
tot
derates linearly with 4.5 mW/K above 60
C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC32
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
-
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
74HCT32
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
-
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
74HC_HCT32
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 September 2012
4 of 17
NXP Semiconductors
74HC32; 74HCT32
Quad 2-input OR gate
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74HC32
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
4.0
mA; V
CC
= 4.5 V
I
O
=
5.2
mA; V
CC
= 6.0 V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
O
= 5.2 mA; V
CC
= 6.0 V
I
I
I
CC
C
I
74HCT32
V
IH
V
IL
V
OH
HIGH-level
input voltage
LOW-level
input voltage
HIGH-level
output voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
I
O
=
20 A
I
O
=
4.0
mA
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
I
O
= 20
A
I
O
= 5.2 mA
I
I
input leakage
current
V
I
= V
CC
or GND;
V
CC
= 5.5 V
-
-
-
0
0.15
-
0.1
0.25
0.1
-
-
-
0.1
0.33
1
-
-
-
0.1
0.4
1
V
V
A
4.4
3.98
4.5
4.32
-
-
4.4
3.84
-
-
4.4
3.7
-
-
V
V
2.0
-
1.6
1.2
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
input leakage
current
supply current
input
capacitance
V
I
= V
CC
or GND;
V
CC
= 6.0 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 6.0 V
-
-
-
-
-
-
-
-
0
0
0
0.15
0.16
-
-
3.5
0.1
0.1
0.1
0.26
0.26
0.1
2.0
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
1
20
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1
40
-
V
V
V
V
V
A
A
pF
1.9
4.4
5.9
3.98
5.48
2.0
4.5
6.0
4.32
5.81
-
-
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
1.5
3.15
4.2
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
74HC_HCT32
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 September 2012
5 of 17
NXP MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
