74AHC1G08; 74AHCT1G08
2-input AND gate
Product data sheet
1. General description
74AHC1G08 and 74AHCT1G08 are high-speed Si-gate CMOS devices. They provide a
2-input AND function.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features
I
I
I
I
I
I
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
SOT353-1 and SOT753 package options
ESD protection:
N
HBM JESD22-A114E: exceeds 2000 V
N
MM JESD22-A115-A: exceeds 200 V
N
CDM JESD22-C101C: exceeds 1000 V
I
Specified from
−40 °C
to +125
°C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AHC1G08GW
74AHCT1G08GW
74AHC1G08GV
74AHCT1G08GV
−40 °C
to +125
°C
SC-74A
−40 °C
to +125
°C
Name
TSSOP5
Description
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
plastic surface-mounted package; 5 leads
Version
SOT353-1
SOT753
Type number
NXP Semiconductors
74AHC1G08; 74AHCT1G08
2-input AND gate
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Inputs
A
L
L
H
H
B
L
H
L
H
Output
Y
L
L
L
H
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
−0.5
−0.5
Max
+7.0
+7.0
-
±20
±25
75
-
+150
250
Unit
V
V
mA
mA
mA
mA
mA
°C
mW
V
I
<
−0.5
V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
−0.5
V < V
O
< V
CC
+ 0.5 V
[1]
−20
-
-
-
−75
−65
T
amb
=
−40 °C
to +125
°C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For both TSSOP5 and SC-74A packages: above 87.5
°C
the value of P
tot
derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
∆t/∆V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 3.3 V
±
0.3 V
V
CC
= 5.0 V
±
0.5 V
Conditions
Min
2.0
0
0
−40
-
-
74AHC1G08
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
4.5
0
0
−40
-
-
74AHCT1G08
Min
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
-
20
V
V
V
°C
ns/V
ns/V
Unit
74AHC_AHCT1G08_6
© NXP B.V. 2007. All rights reserved.
Product data sheet
3 of 11
NXP Semiconductors
74AHC1G08; 74AHCT1G08
2-input AND gate
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
For type 74AHC1G08
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
OH
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
−50 µA;
V
CC
= 2.0 V
I
O
=
−50 µA;
V
CC
= 3.0 V
I
O
=
−50 µA;
V
CC
= 4.5 V
I
O
=
−4.0
mA; V
CC
= 3.0 V
I
O
=
−8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
µA;
V
CC
= 2.0 V
I
O
= 50
µA;
V
CC
= 3.0 V
I
O
= 50
µA;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
CC
C
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2.0
3.0
4.5
-
-
0
0
0
-
-
-
-
1.5
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
0.1
1.0
10
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
10
10
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
40
10
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
pF
Conditions
Min
25
°C
Typ
Max
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
Max
Min
Max
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
HIGH-level
input voltage
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
For type 74AHCT1G08
V
IH
V
IL
V
OH
2.0
-
-
-
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
HIGH-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
=
−50 µA
I
O
=
−8.0
mA
LOW-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
= 50
µA
I
O
= 8.0 mA
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
4.4
3.94
-
-
-
4.5
-
0
-
-
-
-
0.1
0.36
0.1
4.4
3.8
-
-
-
-
-
0.1
0.44
1.0
4.4
3.70
-
-
-
-
-
0.1
0.55
2.0
V
V
V
V
µA
V
OL
I
I
74AHC_AHCT1G08_6
© NXP B.V. 2007. All rights reserved.
Product data sheet
4 of 11
NXP Semiconductors
74AHC1G08; 74AHCT1G08
2-input AND gate
Table 7.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
I
CC
∆I
CC
Conditions
Min
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
additional
per input pin; V
I
= 3.4 V;
supply current other inputs at V
CC
or GND;
I
O
= 0 A; V
CC
= 5.5 V
input
capacitance
-
-
25
°C
Typ
-
-
Max
1.0
1.35
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
-
-
Max
10
1.5
Min
-
-
Max
40
1.5
µA
mA
C
I
-
1.5
10
-
10
-
10
pF
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; t
r
= t
f
=
≤
3.0 ns. For test circuit see
Figure 6.
Symbol
Parameter
Conditions
Min
For type 74AHC1G08
t
pd
propagation
delay
A and B to Y;
see
Figure 5
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF
C
L
= 50 pF
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
C
PD
power
dissipation
capacitance
propagation
delay
per buffer;
C
L
= 50 pF; f = 1 MHz;
V
I
= GND to V
CC
A and B to Y;
see
Figure 5
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
C
PD
power
dissipation
capacitance
per buffer;
C
L
= 50 pF; f = 1 MHz;
V
I
= GND to V
CC
[4]
[4]
[3]
[1]
25
°C
Typ
Max
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
Max
Min
Max
[2]
-
-
-
-
-
4.6
6.5
3.2
4.6
17
8.8
12.3
5.9
7.9
-
1.0
1.0
1.0
1.0
-
10.5
14.0
7.0
9.0
-
1.0
1.0
1.0
1.0
-
12.0
16.0
8.0
10.5
-
ns
ns
ns
ns
pF
For type 74AHCT1G08
t
pd
[1]
[3]
-
-
-
3.6
5.1
19
6.2
7.9
-
1.0
1.0
-
7.1
9.0
-
1.0
1.0
-
8.0
10.5
-
ns
ns
pF
[1]
[2]
[3]
[4]
t
pd
is the same as t
PLH
and t
PHL
.
Typical values are measured at V
CC
= 3.3 V.
Typical values are measured at V
CC
= 5.0 V.
C
PD
is used to determine the dynamic power dissipation P
D
(µW).
P
D
= C
PD
×
V
CC2
×
f
i
+
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts
74AHC_AHCT1G08_6
© NXP B.V. 2007. All rights reserved.
Product data sheet
5 of 11
NXP Semiconductors
74AHC1G08; 74AHCT1G08
2-input AND gate
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
E
A
X
c
y
HE
v
M
A
Z
5
4
A2
A1
(A3)
θ
A
1
e
e1
bp
3
w
M
detail X
Lp
L
0
1.5
scale
3 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
max.
1.1
A1
0.1
0
A2
1.0
0.8
A3
0.15
bp
0.30
0.15
c
0.25
0.08
D
(1)
2.25
1.85
E
(1)
1.35
1.15
e
0.65
e1
1.3
HE
2.25
2.0
L
0.425
Lp
0.46
0.21
v
0.3
w
0.1
y
0.1
Z
(1)
0.60
0.15
θ
7°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT353-1
REFERENCES
IEC
JEDEC
MO-203
JEITA
SC-88A
EUROPEAN
PROJECTION
Fig 7. Package outline SOT353-1 (TSSOP5)
74AHC_AHCT1G08_6
© NXP B.V. 2007. All rights reserved.
Product data sheet
7 of 11
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