74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
January 2008
74AC240, 74ACT240
Octal Buffer/Line Driver with 3-STATE Outputs
Features
■
I
CC
and I
OZ
reduced by 50%
■
Inverting 3-STATE outputs drive bus lines or buffer
General Description
The AC/ACT240 is an octal buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver
which provides improved PC board density.
memory address registers
■
Outputs source/sink 24mA
■
ACT240 has TTL-compatible inputs
Ordering Information
Order Number
74AC240SC
74AC240SJ
74AC240MTC
74AC240PC
74ACT240SC
74ACT240SJ
74ACT240MTC
74ACT240PC
Package
Number
M20B
M20D
MTC20
N20A
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©2006 Fairchild Semiconductor Corporation
74AC240, 74ACT240 Rev. 1.2.0
www.fairchildsemi.com
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
Connection Diagram
OE
1
2
I
0
3
O
4
4
I
1
5
O
5
6
I
2
7
O
6
8
I
3
9
O
7
10
GND
1
20
19
18
17
16
15
14
13
12
11
Logic Symbol
IEEE/IEC
V
CC
OE
2
O
0
I
4
O
1
I
5
O
2
I
6
O
3
I
7
OE
1
I
0
I
1
I
2
I
3
EN
O
0
O
1
O
2
O
3
OE
2
I
4
I
5
I
6
I
7
EN
O
4
O
5
O
6
O
7
Pin Description
Pin Names
OE
1
, OE
2
I
0
–I
7
O
0
–O
7
Inputs
Outputs
Description
3-STATE Output Enable Inputs
Truth Tables
Inputs
OE
1
L
L
H
I
n
L
H
X
Outputs
(Pins 12, 14, 16, 18)
H
L
Z
Inputs
OE
2
L
L
H
I
n
L
H
X
Outputs
(Pins 3, 5, 7, 9)
H
L
Z
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
©2006 Fairchild Semiconductor Corporation
74AC240, 74ACT240 Rev. 1.2.0
www.fairchildsemi.com
2
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
IK
Supply Voltage
DC Input Diode Current
V
I
= −0.5V
V
I
=
V
CC
+
0.5
V
I
I
OK
DC Input Voltage
DC Output Diode Current
V
O
= −0.5V
V
O
=
V
CC
+
0.5V
V
O
I
O
DC Output Voltage
Parameter
Rating
−0.5V
to
+7.0V
−20mA
+20mA
−0.5V
to V
CC
+
0.5V
−20mA
+20mA
−0.5V
to V
CC
+
0.5V
±50mA
±50mA
−65°C
to
+150°C
140°C
DC Output Source or Sink Current
I
CC
or I
GND
DC V
CC
or Ground Current per Output Pin
T
STG
Storage Temperature
T
J
Junction Temperature
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
Supply Voltage
AC
ACT
V
I
V
O
T
A
∆V
/
∆t
∆V
/
∆t
Input Voltage
Output Voltage
Operating Temperature
Parameter
Rating
2.0V to 6.0V
4.5V to 5.5V
0V to V
CC
0V to V
CC
−40°C
to
+85°C
125mV/ns
125mV/ns
Minimum Input Edge Rate, AC Devices:
V
IN
from 30% to 70% of V
CC
, V
CC
@ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate, ACT Devices:
V
IN
from 0.8V to 2.0V, V
CC
@ 4.5V, 5.5V
©2006 Fairchild Semiconductor Corporation
74AC240, 74ACT240 Rev. 1.2.0
www.fairchildsemi.com
3
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics for AC
T
A
= +25°C
Symbol
V
IH
T
A
= −40°C
to
+85°C
Units
V
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
±2.5
µA
µA
V
V
V
Parameter
Minimum HIGH Level
Input Voltage
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Conditions
V
OUT
= 0.1V or
V
CC
– 0.1V
Typ.
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
Guaranteed Limits
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
V
IL
Maximum LOW Level
Input Voltage
V
OUT
= 0.1V or
V
CC
– 0.1V
V
OH
Minimum HIGH Level
Output Voltage
I
OUT
= –50µA
V
IN
=
V
IL
or V
IH
,
I
OH
= –12mA
V
IN
=
V
IL
or V
IH
,
I
OH
= –24mA
V
IN
=
V
IL
or V
IH
,
I
OH
=
–24mA
(1)
0.002
0.001
0.001
V
IN
=
V
IL
or V
IH
,
I
OL
= 12mA
V
IN
=
V
IL
or V
IH
,
I
OL
= 24mA
V
IN
=
V
IL
or V
IH
,
I
OL
=
24mA
(1)
V
I
= V
CC
, GND
V
I
(OE)
=
V
IL
, V
IH
;
V
I
=
V
CC
, GND;
V
O
=
V
CC
, GND
V
OLD
= 1.65V Max.
V
OHD
= 3.85V Min.
V
IN
= V
CC
or GND
I
OUT
= 50µA
V
OL
Maximum LOW Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
±0.25
I
IN(2)
I
OZ
Maximum Input
Leakage Current
Maximum 3-STATE
Leakage Current
Minimum Dynamic
Output Current
(3)
Maximum Quiescent
Supply Current
5.5
5.5
I
OLD
I
OHD
I
CC(2)
5.5
5.5
5.5
75
-75
4.0
40.0
mA
mA
µA
Notes:
1. All outputs loaded; thresholds on input associated with output under test.
2. I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
3. Maximum test duration 2.0ms, one output loaded at a time.
©2006 Fairchild Semiconductor Corporation
74AC240, 74ACT240 Rev. 1.2.0
www.fairchildsemi.com
4
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics for ACT
T
A
= +25°C
Symbol
V
IH
V
IL
V
OH
T
A
= −40°C
to
+85°C
Units
V
V
V
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±1.0
±2.5
1.5
75
−75
µA
µA
mA
mA
mA
µA
V
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW
Level Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
Conditions
V
OUT
=
0.1V or
V
CC
−
0.1V
V
OUT
=
0.1V or
V
CC
−
0.1V
I
OUT
= −50µA
V
IN
=
V
IL
or V
IH
,
I
OH
= −24mA
V
IN
=
V
IL
or V
IH
,
I
OH
= −24mA
(4)
I
OUT
=
50µA
V
IN
=
V
IL
or V
IH
,
I
OL
=
24mA
V
IN
=
V
IL
or V
IH
,
I
OL
=
24mA
(4)
V
I
=
V
CC
, GND
V
I
=
V
IL
, V
IH
;
V
O
=
V
CC
, GND
V
I
=
V
CC
−
2.1V
V
OLD
=
1.65V Max.
V
OHD
=
3.85V Min.
V
IN
=
V
CC
or GND
Typ.
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
Guaranteed Limits
3.86
4.86
0.001
0.001
0.1
0.1
0.36
0.36
±0.1
±0.25
0.6
V
OL
Maximum LOW
Level Output Voltage
4.5
5.5
4.5
5.5
I
IN
I
OZ
I
CCT
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
Maximum 3-STATE
Leakage Current
Maximum I
CC
/Input
Minimum Dynamic
Output Current
(5)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
5.5
5.5
4.0
40.0
Notes:
4. All outputs loaded; thresholds on input associated with output under test.
5. Maximum test duration 2.0ms, one output loaded at a time.
©2006 Fairchild Semiconductor Corporation
74AC240, 74ACT240 Rev. 1.2.0
www.fairchildsemi.com
5
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