SM802101
ClockWorks PCI-e Octal 100MHz/200MHz
Ultra-Low Jitter, HCSL Frequency
Synthesizer
General Description
The SM802101 is a member of the ClockWorks family of
devices from Micrel and provides an extremely low-noise
timing solution for PCI-Express clock signals. It is based
upon a unique patented architecture that provides very-low
phase noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes eight HCSL output clocks at 100MHz or
200MHz. The SM802101 accepts a 25MHz crystal or
LVCMOS reference clock.
Data sheets and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
ClockWorks™
Features
•
Generates eight HCSL clock outputs at 100MHz or
200MHz
•
2.5V or 3.3V operating range
•
Typical phase jitter @ 100MHz
(1.875MHz to 20MHz): 105fs
•
Industrial temperature range (–40°C to +85°C)
•
Green, RoHS, and PFOS compliant
•
Available in 44-pin 7mm
×
7mm QFN package
Applications
•
PCI-Express
Block Diagram
ClockWorks is a trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
March 27, 2013
Revision 1.3
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802101
Ordering Information
(1)
Part Number
SM802101UMG
SM802101UMGR
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Marking
802101
802101
Shipping
Tray
Tape and Reel
Temperature Range
–40°C to +85°C
–40°C to +85°C
Package
44-Pin QFN
44-Pin QFN
Pin Configuration
44-Pin QFN
(Top View)
Pin Description
Pin Number
1, 2
4, 5
7, 8
25, 26
28, 29
32, 33
35, 36
41, 42
Pin Name
/Q5, Q5
/Q6, Q6
/Q7, Q7
/Q0, Q0
/Q1, Q1
/Q2, Q2
/Q3, Q3
/Q4, Q4
O, (DIF)
HCSL
Differential Clock Output
Pin Type
Pin Level
Pin Function
March 27, 2013
2
Revision 1.3
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802101
Pin Description (Continued)
Pin Number
14
12, 13
31, 37, 38
16, 43, 44
21, 23
24, 39
3, 6, 40
Pin Name
FSEL
VDD
VDDO1
VDDO2
VSS
(Exposed
Pad)
VSSO1
VSSO2
PWR
PWR
PWR
Pin Type
I, (SE)
PWR
PWR
PWR
Pin Level
LVCMOS
Pin Function
Frequency Select, 1 = 100MHz, 0 = 200MHz,
45KΩ pull-up
Power Supply
Power Supply for Outputs Q0 – Q3
Power Supply for Outputs Q4 – Q7
Core Power Supply Ground. The exposed pad must
be connected to the VSS ground plane.
Power Supply Ground for Q0 – Q3
Power Supply Ground for Outputs Q4 – Q7
PLL Bypass, Selects Output Source
9
PLL_BYPASS
I, (SE)
LVCMOS
0 = Normal PLL Operation
1 = Output from Input Reference Clock or Crystal
45KΩ pull-down
10
11, 20, 27, 30, 34
17
18
19
15
22
XTAL_SEL
TEST
REF_IN
XTAL_IN
XTAL_OUT
OE1
OE2
I, (SE)
I, (SE)
O, (SE)
I, (SE)
I, (SE)
LVCMOS
10pF crystal
10pF crystal
LVCMOS
LVCMOS
I, (SE)
LVCMOS
Selects PLL Input Reference Source
0 = REF_IN, 1 = XTAL, 45KΩ pull-up
Factory Test pins, Do not connect anything to these
pins.
Reference Clock Input
Crystal Reference Input, no load caps needed (see
Figure 5).
Crystal Reference Output, no load caps needed
(see Figure 5).
Output Enable, Outputs Q0 – Q3 disable to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Output Enable, Outputs Q4 – Q7 disable to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Truth Tables
PLL_BYPASS
0
1
−
−
−
−
XTAL_SEL
−
−
0
1
−
−
Output Frequency
(MHz)
200
100
OE2
1
1
1
1
OE1
1
1
1
1
INPUT
−
−
REF_IN
XTAL
−
−
OUTPUT
PLL
XTAL/REF_IN
−
−
0
1
1
0
Q4-Q7 Tri-state
Q0-Q3 Tri-state
FSEL
0
1
March 27, 2013
3
Revision 1.3
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802101
Absolute Maximum Ratings
(1)
Supply Voltage (V
DD
, V
DDO1/2
) ...................................... +4.6V
Input Voltage (V
IN
) ..............................
−0.50V
to V
DD
+ 0.5V
Lead Temperature (soldering, 20s) ............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (T
s
) .........................
−65°C
to
+150°C
Operating Ratings
(2)
Supply Voltage (V
DD
, V
DDO1/2
)............ +2.375V to +3.465V
Ambient Temperature (T
A
) ....................... –40°C to +85°C
(3)
Junction Thermal Resistance
QFN (θ
JA
)
Still-Air ...................................................... 24°C/W
QFN (ψ
JB
)
Junction-to-Board ...................................... 8°C/W
DC Electrical Characteristics
(4)
V
DD
= V
DDO1/2
= 3.3V
±5%
or 2.5V
±5%
V
DD
= 3.3V
±5%,
V
DDO1/2
= 3.3V
±5%
or 2.5V
±5%
T
A
=
−40°C
to
+85°C.
Symbol
V
DD
, V
DDO1/2
V
DD
, V
DDO1/2
Parameter
2.5V Operating Voltage
3.3V Operating Voltage
Eight Outputs enabled, 100MHz
Outputs 50Ω to V
SS
Eight Outputs enabled, 200MHz
Outputs 50Ω to V
SS
Supply current V
DD
+ V
DDO
Four Outputs enabled, 100MHz
Outputs 50Ω to V
SS
, OE1 or OE2 = 0
Four Outputs enabled, 200MHz
Outputs 50Ω to V
SS
, OE1 or OE2 =0
149
185
Condition
Min.
2.375
3.135
Typ.
2.5
3.3
217
Max.
2.625
3.465
270
Units
V
V
229
285
mA
I
DD
158
197
HCSL DC Electrical Characteristics
(4)
V
DD
= V
DDO1/2
= 3.3V
±5%
or 2.5V
±5%
V
DD
= 3.3V
±5%,
V
DDO1/2
= 3.3V
±5%
or 2.5V
±5%
T
A
=
−40°C
to
+85°C.
R
L
= 50Ω to V
SS
Symbol
Parameter
Condition
Min
660
−150
250
Typ.
700
0
350
Max.
850
27
550
Units
mV
mV
mV
V
OH
V
OL
V
CROSS
Notes:
1.
Output High Voltage
Output Low Voltage
Crossing Point Voltage
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
2.
3.
4.
March 27, 2013
4
Revision 1.3
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802101
LVCMOS (PLL_BYPASS, XTAL_SEL, FSEL, OE1, OE2) DC Electrical Characteristics
(4)
V
DD
= 3.3V
±5%,
or 2.5V
±5%,
T
A
=
−40°C
to
+85°C.
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
−150
Condition
Min.
2
−0.3
Typ.
Max.
V
DD
+ 0.3
0.8
150
Units
V
V
µA
µA
REF_IN DC Electrical Characteristics
(4)
V
DD
= 3.3V
±5%,
or 2.5V
±5%,
T
A
=
−40°C
to
+85°C.
Symbol
V
IH
V
IL
I
IN
Parameter
Input High Voltage
Input Low Voltage
Input Current
XTAL_SEL = V
IL
, V
IN
= 0V to V
DD
XTAL_SEL = V
IH
, V
IN
= V
DD
Condition
Min.
1.1
−0.3
−5
20
Typ.
Max.
V
DD
+ 0.3
0.6
5
Units
V
V
µA
Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
Condition
10pF Load
Min.
Typ.
25
1
10
50
5
100
Max.
Units
MHz
Ω
pF
uW
Fundamental, Parallel Resonant
March 27, 2013
5
Revision 1.3
hbwhelp@micrel.com
or (408) 955-1690
FPGA/CPLD
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