电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SN54LS280J

产品描述LS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, CDIP14
产品类别逻辑    逻辑   
文件大小166KB,共4页
制造商Motorola ( NXP )
官网地址https://www.nxp.com
下载文档 详细参数 选型对比 全文预览

SN54LS280J概述

LS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, CDIP14

SN54LS280J规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Motorola ( NXP )
包装说明DIP, DIP14,.3
Reach Compliance Codeunknow
其他特性ODD/EVEN PARITY GENERATOR
系列LS
JESD-30 代码R-GDIP-T14
JESD-609代码e0
长度19.495 mm
负载电容(CL)15 pF
逻辑集成电路类型PARITY GENERATOR/CHECKER
位数9
功能数量1
端子数量14
最高工作温度125 °C
最低工作温度-55 °C
输出极性COMPLEMENTARY
封装主体材料CERAMIC, GLASS-SEALED
封装代码DIP
封装等效代码DIP14,.3
封装形状RECTANGULAR
封装形式IN-LINE
峰值回流温度(摄氏度)NOT SPECIFIED
电源5 V
最大电源电流(ICC)27 mA
传播延迟(tpd)45 ns
认证状态Not Qualified
座面最大高度5.08 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术TTL
温度等级MILITARY
端子面层Tin/Lead (Sn/Pb)
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度7.62 mm

文档预览

下载PDF文档
SN54/74LS280
9-BIT ODD/EVEN PARITY
GENERATORS/CHECKERS
The SN54/ 74LS280 is a Universal 9-Bit Parity Generator / Checker. It fea-
tures odd / even outputs to facilitate either odd or even parity. By cascading,
the word length is easily expanded.
The LS280 is designed without the expander input implementation, but the
corresponding function is provided by an input at Pin 4 and the absence of any
connection at Pin 3. This design permits the LS280 to be substituted for the
LS180 which results in improved performance. The LS280 has buffered
inputs to lower the drive requirements to one LS unit load.
9-BIT ODD/ EVEN PARITY
GENERATORS/ CHECKERS
LOW POWER SCHOTTKY
Generates Either Odd or Even Parity for Nine Data Lines
Typical Data-to-Output Delay of only 33 ns
Cascadable for n-Bits
Can Be Used To Upgrade Systems Using MSI Parity Circuits
Typical Power Dissipation = 80 mW
INPUTS
VCC
14
F
13
F
G
H
1
G
2
H
3
NC
I
E
12
E
D
11
D
C
10
C
B
9
B
A
8
J SUFFIX
CERAMIC
CASE 632-08
14
1
14
N SUFFIX
PLASTIC
CASE 646-06
1
EVEN ODD
14
1
A
INPUTS
4
5
6
7
GND
I
INPUT EVEN ODD
D SUFFIX
SOIC
CASE 751A-02
OUTPUTS
ORDERING INFORMATION
FUNCTION TABLE
NUMBER OF INPUTS A
THRU 1 THAT ARE HIGH
0, 2, 4, 6, 8
1, 3, 5, 7, 9
H = HIGH Level, L = LOW Level
OUTPUTS
∑EVEN
H
L
∑ODD
L
H
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
GUARANTEED OPERATING RANGES
Symbol
VCC
TA
IOH
IOL
Supply Voltage
Operating Ambient Temperature Range
Output Current — High
Output Current — Low
Parameter
54
74
54
74
54, 74
54
74
Min
4.5
4.75
– 55
0
Typ
5.0
5.0
25
25
Max
5.5
5.25
125
70
– 0.4
4.0
8.0
Unit
V
°C
mA
mA
FAST AND LS TTL DATA
5-456

SN54LS280J相似产品对比

SN54LS280J SN54LS280
描述 LS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, CDIP14 LS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, CDIP14
系列 LS LS
位数 9 9
功能数量 1 1
端子数量 14 14
输出极性 COMPLEMENTARY COMPLEMENTARY
温度等级 MILITARY MILITARY
端子形式 THROUGH-HOLE THROUGH-HOLE
端子位置 DUAL DUAL

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2811  428  2070  1167  2617  27  19  20  44  25 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved