FAN73892 — 3-Phase Half-Bridge Gate-Drive IC
September 2012
FAN73892
3-Phase Half-Bridge Gate-Drive IC
Features
Floating Channel for Bootstrap Operation to +600 V
Typically 350 mA/650 mA Sourcing/Sinking
Current-Driving Capability for All Channels
Extended Allowable Negative V
S
Swing to -9.8 V for
Signal Propagation at V
DD
=V
BS
=15 V
Outputs Out of Phase with Input Signals
Over-Current Shutdown Turns Off All Six Drivers
Matched Propagation Delay for All Channels
3.3 V and 5.0 V Input Logic Compatible
Adjustable Fault-Clear Timing
Built-in Advanced Input Filter
Built-in Shoot-Through Prevention Logic
Built-in Soft Turn-Off Function
Common-Mode dv/dt Noise-Canceling Circuit
Built-in UVLO Functions for All Channels
Description
The FAN73892 is a monolithic three-phase half-bridge
gate-drive IC designed for high-voltage, high-speed,
driving MOSFETs and IGBTs operating up to +600 V.
Fairchild’s high-voltage process and common-mode
noise-canceling technique provide stable operation of
high-side drivers under high-dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to V
S
= -9.8 V (typical) for V
BS
=15 V.
The protection functions include under-voltage lockout
and inverter over-current trip with an automatic fault-
clear function. Over-current protection that terminates all
six outputs can be derived from an external current-
sense resistor. An open-drain fault signal is provided to
indicate that an over-current or under-voltage shutdown
has occurred. The UVLO circuits prevent malfunction
when V
DD
and V
BS
are lower than the threshold voltage.
Output drivers typically source and sink 350 mA and
650 mA, respectively; which is suitable for three-phase
half-bridge applications in motor drive systems.
Applications
3-Phase Motor Inverter Driver
Air Conditioner, Washing Machine, Refrigerator,
Dish Washer
Industrial Inverter – Sewing Machine, Power Tool
General-Purpose Three-Phase Inverter
28-SOIC
Ordering Information
Part Number
FAN73892MX
(1)
Package
28-Lead, Small Outline Integrated Circuit, (SOIC)
Operating
Temperature
-40 to +125°C
Packing
Method
Tape & Reel
Note:
1. These devices passed wave-soldering test by JESD22A-111.
© 2011 Fairchild Semiconductor Corporation
FAN73892 • Rev.1.0.2
www.fairchildsemi.com
FAN73892 — 3-Phase Half-Bridge Gate-Drive IC
Typical Application Diagram
Figure 1. 3-Phase BLDC Motor Drive Application
FAN73892M
Internal Block Diagram
50K
V
B1
UVLO
2
HIN1
28
50K
HO1
UHIN
INPUT NOISE
FILTER
[ t
FLTIN
=250ns
]
NOISE
CANCELLER
3
HIN2
R R
S
27
Q
V
S1
V
DD
UVLO
26
1
50K
4
HIN3
V
DD
50K
5
LIN1
ULIN
SHOOT-THROUGH
PREVENTION
DELAY
LO1
COM
16
50K
U Phase Driver
I
SOFT
6
LIN2
13
50K
7
LIN3
DEAD-TIME
[
D
T
=300ns
]
V
DD
VHIN
V
B2
24
23
22
15
V Phase Driver
I
SOFT
HO2
V
S2
LO2
COM
V
B3
10
EN
150K
ENABLE INPUT
FILTER
[ t
FLTEN
=250ns
]
VLIN
8
12
FO
V
DD
WHIN
20
19
18
14
W Phase Driver
Vss
WLIN
HO3
V
S3
LO3
COM
V
DD_UVLO
Fault
V
REF
SOFT-OFF
I
SOFT
i
RCIN
11
RCIN
V
RCIN,TH
= 3.3V
V
RCIN,HYS
= 0.7V
CS_COMP
Q
R
LATCH
S
CS
LEB
9
3.3V
0.5V
Protection Circuit
Figure 2. Functional Block Diagram
© 2011 Fairchild Semiconductor Corporation
FAN73892 • Rev.1.0.2
www.fairchildsemi.com
2
FAN73892 — 3-Phase Half-Bridge Gate-Drive IC
Pin Configuration
Figure 3. Pin Assignments
Pin Definitions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17, 21, 25
18
19
20
22
23
24
26
27
28
Name
V
DD
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FO
CS
EN
RCIN
V
SS
COM
LO3
LO2
LO1
NC
V
S3
HO3
V
B3
V
S2
HO2
V
B2
V
S1
HO1
V
B1
Description
Logic and low-side gate driver power supply voltage
Logic Input 1 for high-side gate 1 driver
Logic Input 2 for high-side gate 2 driver
Logic Input 3 for high-side gate 3 driver
Logic Input 1 for low-side gate 1 driver
Logic Input 2 for low-side gate 2 driver
Logic Input 3 for low-side gate 3 driver
Fault output with open drain (indicates over-current and low-side under-voltage)
Analog input for over-current shutdown
Logic input for shutdown functionality
An external RC network input used to define the fault-clear delay
Logic ground
Low-side driver return
Low-side gate driver 3 output
Low-side gate driver 2 output
Low-side gate driver 1 output
No connect
High-side driver 3 floating supply offset voltage
High-side driver 3 gate driver output
High-side driver 3 floating supply
High-side driver 2 floating supply offset voltage
High-side driver 2 gate driver output
High-side driver 2 floating supply
High-side driver 1 floating supply offset voltage
High-side driver 1 gate driver output
High-side driver 1 floating supply
www.fairchildsemi.com
3
© 2011 Fairchild Semiconductor Corporation
FAN73892 • Rev.1.0.2
FAN73892 — 3-Phase Half-Bridge Gate-Drive IC
Absolute Maximum Ratings
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. T
A
=25°C, unless otherwise specified.
Symbol
V
S
V
B
V
DD
V
HO
V
LO
V
IN
V
FO
PW
HIN
dV
S
/dt
P
D
θ
JA
T
J
T
STG
Parameter
High-Side Floating Offset Voltage
High-Side Floating Supply Voltage
Low-Side and Logic-Fixed supply voltage
High-Side Floating Output Voltage V
HO1,2,3
Low-Side Floating Output Voltage V
LO1,2,3
Input Voltage ( HINx , LINx , CS, and EN)
Fault Output Voltage ( FO )
High-Side Input Pulse Width
Allowable Offset Voltage Slew Rate
Power Dissipation
(2,3)
Min.
V
B1,2,3
-25
-0.3
-0.3
V
S1,2,3
-0.3
-0.3
-0.3
-0.3
500
Max.
V
B1,2,3
+0.3
625.0
25.0
V
B1,2,3
+0.3
V
DD
+0.3
5.5
V
DD
+0.3
±50
1.4
70
150
Unit
V
V
V
V
V
V
V
ns
V/ns
W
°C/W
°C
°C
Thermal Resistance
Junction Temperature
Storage Temperature
-55
150
Notes:
2.
Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
Refer to the following standards:
JESD51-2: Integral circuit’s thermal test method environmental conditions, natural convection;
JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages.
3. Do not exceed maximum power dissipation (P
D
) under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V
B1,2,3
V
S1,2,3
V
DD
V
HO1,2,3
V
LO1,2,3
V
FO
V
CS
V
IN
V
SS
T
A
Parameter
High-Side Floating Supply Voltage
High-Side Floating Supply Offset Voltage
Low-Side and Logic Fixed Supply Voltage
High-Side Output Voltage
Low-Side Output Voltage
Fault Output Voltage ( FO )
Current-Sense Pin Input Voltage
Logic Input Voltage ( HIN1,2,3 and LIN1,2,3 )
Logic Ground
Ambient Temperature
Min.
V
S1,2,3
+10
6-V
DD
10
V
S1,2,3
COM
V
SS
V
SS
V
SS
-5
-40
Max.
V
S1,2,3
+20
600
20
V
B1,2,3
V
DD
V
DD
5
5
5
+125
Unit
V
V
V
V
V
V
V
V
V
°C
© 2011 Fairchild Semiconductor Corporation
FAN73892 • Rev.1.0.2
www.fairchildsemi.com
4
FAN73892 — 3-Phase Half-Bridge Gate-Drive IC
Electrical Characteristics
V
BIAS
(V
DD
, V
BS1,2,3
) = 15.0 V and T
A
= 25°C unless otherwise specified. The V
IN
and I
IN
parameters are referenced to
COM and are applicable to all six channels. The V
O
and I
O
parameters are referenced to V
S1,2,3
and COM and are
applicable to the respective output leads: HO1,2,3 and LO1,2,3. The V
DDUV
parameters are referenced to COM. The
V
BSUV
parameters are referenced to V
S1,2,3
.
Symbol
I
QDD
I
PDD
V
DDUV+
V
DDUV-
V
DDHYS
Parameter
Quiescent V
DD
Supply Current
Operating V
DD
Supply Current
V
DD
Supply Under-Voltage Positive-Going
Threshold
V
DD
Supply Under-Voltage Negative-Going
Threshold
V
DD
Supply Under-Voltage Lockout
Hysteresis
V
BS
Supply Under-Voltage Positive-Going
Threshold
V
BS
Supply Under-Voltage Negative-Going
Threshold
V
BS
Supply Under-Voltage Lockout
Hysteresis
Offset Supply Leakage Current
Quiescent V
BS
Supply Current
Operating V
BS
Supply Current
High-Level Output voltage, V
BIAS
-V
O
Low-Level Output voltage, V
O
Output HIGH Short-Circuit Pulse Current
(4)
Condition
V
LIN1,2,3
=0 V or 5 V, EN=0 V
f
LIN1,2,3
=20 kHz, rms Value
V
DD
=Sweep
V
DD
=Sweep
V
DD
=Sweep
Min. Typ. Max. Unit
200
500
7.5
7.0
8.5
8.0
0.5
9.3
8.7
μA
μA
V
V
V
Low-Side Power Supply Section
Bootstrapped Power Supply Section
V
BSUV+
V
BSUV-
V
BSHYS
I
LK
I
QBS
I
PBS
V
OH
V
OL
I
O+
I
O-
V
S
V
BS1,2,3
=Sweep
V
BS1,2,3
=Sweep
V
BS1,2,3
=Sweep
V
B1,2,3
=V
S1,2,3
=600 V
V
HIN1,2,3
=0 V or 5 V, EN=0 V
f
HIN1,2,3
=20 kHz, rms Value
I
O
=0 mA (No Load)
I
O
=0 mA (No Load)
V
O
=15 V, V
IN
=0 V with
PW≤10 µs
250
500
350
650
-9.8
-7.0
10
200
50
320
7.5
7.0
8.5
8.0
0.5
10
80
480
100
100
9.3
8.7
V
V
V
μA
μA
μA
mV
mV
mA
mA
V
Gate Driver Output Section
Output LOW Short-Circuit Pulsed Current
(4)
V
O
=0 V, V
IN
=5 V with PW≤10 µs
Allowable Negative V
S
Pin Voltage for HIN
Signal Propagation to HO
Logic "0" Input Voltage HIN1,2,3 , LIN1,2,3
Logic "1" Input Voltage HIN1,2,3 , LIN1,2,3
Logic Input Bias Current (HO=LO=HIGH)
Logic Input Bias Current (HO=LO=LOW)
Logic Input Pull-Up Resistance
Enable Positive-Going Threshold Voltage
Enable Negative-Going Threshold Voltage
Logic Enable “1” Input Bias Current
Logic Enable “0” Input Bias Current
V
EN
=5 V (Pull-Down=150KΩ)
V
EN
=0 V
V
IN
=0 V
V
IN
=5 V
Logic Input Section
V
IH
V
IL
I
IN+
I
IN-
R
IN
V
EN+
V
EN-
I
EN+
I
EN-
2.5
0.8
100
8.5
50
2.5
0.8
33
2
25
V
V
μA
μA
KΩ
V
V
μA
μA
Enable Control Section (EN)
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation
FAN73892 • Rev.1.0.2
www.fairchildsemi.com
5
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