74LVX541 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
September 1999
Revised April 2005
74LVX541
Low Voltage Octal Buffer/Line Driver with
3-STATE Outputs
General Description
The LVX541 is an octal non-inverting buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver which
provides improved PC board density. The inputs tolerate up
to 7V allowing interface of 5V systems to 3V systems.
Features
s
Input voltage translation from 5V to 3V
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number
74LVX541M
74LVX541SJ
74LVX541MTC
Package Number
M20B
M20D
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Descriptions
Pin Names
OE
1
, OE
2
I
0
- I
7
O
0
- O
7
Descriptions
3-STATE Output Enable Inputs
Inputs
3-STATE Outputs
Truth Table
Inputs
OE
1
L
H
X
L
H HIGH Voltage Level
L LOW Voltage Level
OE
2
L
X
H
L
Outputs
I
H
X
X
L
H
Z
Z
L
X Immaterial
Z High Impedance
© 2005 Fairchild Semiconductor Corporation
DS500291
www.fairchildsemi.com
74LVX541
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
0.5V to
7.0V
20 mA
0.5V to 7V
20 mA
20 mA
0.5V to V
CC
0.5V
r
25 mA
r
75 mA
65
q
C to
150
q
C
180 mW
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Input Rise and Fall Time (
'
t/
'
V)
2.0V to
3.6V
0V to
5.5V
0V to V
CC
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
V
O
40
q
C to
85
q
C
0 ns/V to 100 ns/V
0.5V
V
CC
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
(I
CC
or I
GND
)
Storage Temperature (T
STG
)
Power Dissipation
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
Unused inputs must be held HIGH or LOW. They may not float
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level Input
Voltage
V
IL
LOW Level Input
Voltage
V
OH
HIGH Level Output
Voltage
V
OL
LOW Level Output
Voltage
I
OZ
I
IN
I
CC
3-STATE Output
OFF-State Current
Input Leakage Current
Quiescent Supply Current
V
CC
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
3.6
1.9
2.9
2.58
0.0
0.0
0.1
0.1
0.36
2.0
3.0
T
A
Min
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.48
0.1
0.1
0.44
V
V
IN
V
IN
V
OUT
V
IN
V
IN
V
V
IN
25
q
C
Typ
Max
T
A
40
q
C to
85
q
C
Max
1.5
2.0
2.4
0.5
0.8
0.8
Min
Units
Conditions
V
V
I
OH
V
IH
or V
IL
I
OH
I
OH
I
OL
V
IH
or V
IL
I
OL
I
OL
V
IH
or V
IL
V
CC
or GND
5.5V or GND
V
CC
or GND
50
P
A
50
P
A
4 mA
50
P
A
50
P
A
4 mA
r
0.25
r
0.1
4.0
r
2.5
r
1.0
40.0
P
A
P
A
P
A
Noise Characteristics
(Note 3)
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum HIGH Level Dynamic Input Voltage
t
f
3 ns.
V
CC
(V)
3.3
3.3
3.3
3.3
Typ
0.5
T
A
25
q
C
Limits
0.8
Units
V
V
V
V
C
L
C
L
C
L
C
L
Conditions
50 pF
50 pF
50 pF
50 pF
0.5
0.8
2.0
0.8
Note 3:
Input t
r
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2
74LVX541
AC Electrical Characteristics
Symbol
t
PLH
t
PHL
Parameter
Propagation Delay
Time
3.3
r
0.3
t
PZL
t
PZH
3-STATE Output
Enable Time
9.6
3.3
r
0.3
6.8
9.3
t
PLZ
t
PHZ
t
OSLH
t
OSHL
3-STATE Output
Disable Time
Output to Output
Skew (Note 4)
2.7
3.3
r
0.3
2.7
3.3
|t
PLHm
t
PLHn
|; t
OSHL
|t
PHLm
t
PHLn
|.
V
CC
(V)
2.7
Min
T
A
25
q
C
Typ
6.1
8.6
4.7
7.2
7.1
Max
11.3
14.9
7.0
10.5
13.8
17.3
10.5
14.0
17.9
15.4
1.5
1.5
T
A
40
q
C to
85
q
C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
13.5
17.0
8.5
12.0
16.5
20.0
12.5
16.0
20.0
17.5
1.5
1.5
Units
C
L
ns
C
L
C
L
C
L
C
L
R
L
C
L
ns
R
L
C
L
R
L
C
L
R
L
C
L
R
L
C
L
Conditions
15 pF
50 pF
15 pF
50 pF
15 pF
1 k
:
50 pF
1 k
:
15 pF
1 k
:
50 pF
1 k
:
50 pF
1 k
:
50 pF
2.7
11.6
10.7
ns
ns
Note 4:
Parameter guaranteed by design. t
OSLH
Capacitance
Symbol
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance (Note 5)
Parameter
T
A
Min
25
q
C
Typ
4
6
19
Max
10
T
A
40
q
C to
85
q
C
Max
10
Min
Units
pF
pF
pF
Note 5:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(opr.)
C
PD
x V
CC
x f
IN
I
CC
8 (per bit)
3
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74LVX541
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
www.fairchildsemi.com
4
74LVX541
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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