LC898111AXB
CMOS LSI
Optical Image Stabilization (OIS)
Controller & Driver
Overview
The LC898111AXB is Optical Image Stabilization (OIS) system
control LSI for smartphone camera modules.
The LSI have built-in digital signal processing circuits, such as a 2ch
saturation H-Bridge Driver and a Flexible Filter circuit, and control
VCM type actuators.
The LC898111AXB is identical LSI except for the dimensions, i.e.
XB has WLP thickness, max. 0.69 mm with B/C.
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WLCSP48, 3.22x2.57
Function
Digital
signal processing LSI (Logic LSI)
Built-in digital servo circuit
Built-in Gyro filter
AD converter
12-bit
input 5ch
Equipped with a sample-hold circuit
DA converter
8-bit
Output 2ch (Constant current Bias : max 7mA)
Built-in Serial I/F circuit
(2-wire I
2
C-Bus or 4-wire SPI Bus interface)
Built-in Hall Bias circuit
Built-in Hall Amp
(Gain of Opamp :
x25, x50, x75, x100, x150, x200)
Built-in OSC (Oscillator)
48MHz
5% (Frequency adjustment function)
External Clock input is possible
from TSTCLK (48MHz
5%)
Built-in LDO (Low Drop-Out regulator)
Digital Gyro I/F for the companies (SPI Bus)
(Please refer for the details)
Support Hall sensor and Photo Reflector as means
to detect a position
Motor
Driver
Saturation-drive H bridge
x2ch
IO max : 220mA
Package
WLCSP48, 3.22mm
x
2.57mm,
thickness max 0.69mm, with B/C
Pb-Free
Halogen Free
Power
supply voltage
Logic : DVDD30 = 2.6 to 3.6 V
Driver : VM = 2.6 to 3.6 V
* I C Bus is a trademark of Philips Corporation.
2
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
April 2015 - Rev. 1
1
Publication Order Number :
LC898111AXB/D
LC898111AXB
Block Diagram
Figure 3.1 Example of wiring diagram (Hall) in LC898111AXB
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2
LC898111AXB
Package Dimensions
unit : mm
WLCSP48, 3.22x2.57
CASE 567GE
ISSUE O
D
A B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
DIM
A
A1
A2
b
D
E
e
MILLIMETERS
MIN
MAX
0.69
0.16
0.26
0.43 REF
0.21
0.31
3.22 BSC
2.57 BSC
0.40 BSC
PIN A1
REFERENCE
E
2X
0.13 C
0.13 C
TOP VIEW
A2
0.10 C
A
2X
GENERIC
MARKING DIAGRAM*
XXXXXXX
XXXXXXX
AWLYYWW
0.08 C
NOTE 3
A1
SIDE VIEW
C
SEATING
PLANE
e/2
e
F
E
D
C
B
A
1
2
3
4
5
6
7
8
48X
XXXXXXX
A
WL
YY
WW
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
b
0.05 C A B
0.03 C
*This information is generic. Please refer
to device data sheet for actual part
marking.
RECOMMENDED
SOLDERING FOOTPRINT*
e/2
e
0.40
PITCH
A1
PACKAGE
OUTLINE
BOTTOM VIEW
48X
0.40
PITCH
0.25
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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3
LC898111AXB
Pin Assignment
Top View
1
OPTESTO
OPINPY
ADVDD
ADVSS
GYYI
HXI
2
HLXBO
OPINMY
ADVRH
GYXI
DVSS
I2CDT
3
EPSOIF
DAOPVDD
ADVRL
HYI
EPCSBIF2
I2CCK
4
DVDD30
DAOPVSS
OPINPX
SAD4
SSB
MISO
5
BUSY2
HLYBO
OPINMX
ZRESET
LDOPO
DVDD30
6
BUSY1
TEST
DVSS
TSTCLK
LDSTBB
DGSCLK
7
VM
MON
CLKSEL
DGMOSI
DGMISO
DGINT
8
OUT4
F
OUT3
E
OUT2
D
OUT1
C
PGND
B
DGSSB
A
Driver
DAC
OpAmp
ADC
EEPROM i/f
Logic GND
IO VDD (2.6V to 3.6V)
Logic Core VDD (1.14 to 1.26V)
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4
LC898111AXB
typ
I : INPUT, O : OUTPUT, B : BIDIRECTION, P : Power, GND
Ball No
F8
F7
F6
F5
F4
F3
F2
F1
E8
E7
E6
E5
E4
E3
E2
E1
D8
D7
D6
D5
D4
D3
D2
D1
C8
C7
C6
C5
C4
C3
C2
C1
B8
B7
B6
B5
B4
B3
B2
B1
A8
Pin Name
OUT4
VM
BUSY1
BUSY2
DVDD30
EPSOIF
HLXBO
OPTESTO
OUT3
MON
TEST
HLYBO
DAOPVSS
DAOPVDD
OPINMY
OPINPY
OUT2
CLKSEL
DVSS
OPINMX
OPINPX
ADVRL
ADVRH
ADVDD
OUT1
DGMOSI
TSTCLK
ZRESET
SAD4
HYI
GYXI
ADVSS
PGND
DGMISO
LDSTBB
LDOPO
SSB
EPCSBIF2
DVSS
GYYI
DGSSB
DGINT
DGSCLK
DVDD30
MISO
I2CCK
I2CDT
HXI
type
O
P
B
B
P
I
O
O
O
B
I
O
P
P
I
I
O
I
P
I
I
I
I
P
O
B
I
I
I
I
I
P
P
B
I
P
I
B
P
I
B
B
B
P
O
I
B
I
Driver Output
Driver VDD (2.6V to 3.6V)
EEPROM I/F (at I C type EEPROM ) / BUSY1(O)
/ General-purpose IOPORT(B) / inner signal Monitor(O)
BUSY2(O) / General-purpose IOPORT(B) / inner signal Monitor(O)
Logic IO VDD (2.6V to 3.6V)
EEPROM I/F
Hall-X Bias (Current Drive)
OpAmp Test out
Driver output
inner signal monitor / General-purpose IOPORT
SPI & External clock case sets “1” other cases set “0”
Hall-Y Bias (Current Drive)
DA&Opamp VSS
DA&Opamp VDD (2.6V to 3.6V)
Hall-Y OpAmp input
Hall-Y OpAmp input+
Driver Output
change pin of OSC(0) and External clock(1)
Logic GND
Hall-X OpAmp input
Hall-X OpAmp input+
ADC Reference Voltage Low input
ADC Reference Voltage High input
AD VDD (2.6V to 3.6V)
Driver Output
Digital Gyro (4-wire)IF data(O) / HPS Control(O) / General-purpose IOPORT(B)
CLKSEL=1 : External Clock, CLKSEL=0 : change pin of I C(0) and SPI(1)
Hard Wafer Reset
General-purpose AD input
Hall-Y AD input
Gyro-X AD input
AD GND
Driver GND
Digital Gyro SPI IF Data( I ) / Digital Gyro I C IF Data(B)
LDO Standby (0 : Standby On, 1 : Standby Off)
LDO Power supply out (Logic Core VDD (1.14V to 1.26V))
SPI I/F Chip Select / VDD fix at I C i/f
EEPROM I/F
Logic GND
Gyro-Y AD input
Digital Gyro SPI IF Chip Select(O) / inner signal monitor(O) / General-purpose
IOPORT(B)
Digital Gyro SPI IF Data Busy( I ) / inner signal monitor(O) / General-purpose
IOPORT(B)
Digital Gyro SPI IF clock (O) / Digital Gyro I C IF clock(O) /
HPS Control 1(O) / General-purpose IOPORT (B)
Logic IO VDD (2.6V to 3.6V) and power supply to LDO
SPI I/F Data / General-purpose IOPORT / inner signal monitor
I C_IF clock / SPI IF clock
I C_IF Data(B) / SPI IF Data
Hall-X AD input
2
2
2
2
2
2
2
Description
A7
A6
A5
A4
A3
A2
A1
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5
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