NDDL1N60Z, NDTL1N60Z
Product Preview
N-Channel Power MOSFET
600 V, 15
W
Features
•
100% Avalanche Tested
•
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
ABSOLUTE MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Continuous Drain Current R
qJC
Steady State, T
C
= 25°C (Note 1)
Continuous Drain Current R
qJC
Steady State, T
C
= 100°C (Note 1)
Pulsed Drain Current, t
p
= 10
ms
Power Dissipation – R
qJC
Steady State, T
C
= 25°C
Gate−to−Source Voltage
Single Pulse Drain−to−Source
Avalanche Energy (I
PK
= 1.0 A)
Peak Diode Recovery (Note 2)
Source Current (Body Diode)
Lead Temperature for Soldering
Leads
Operating Junction and Storage
Temperature
Symbol
V
DSS
I
D
I
D
I
DM
P
D
V
GS
EAS
dv/dt
I
S
T
L
T
J
, T
STG
0.5
260
−55
to +150
0.8
0.5
3.2
25
±30
60
4.5
0.3
NDD
600
0.3
0.15
1.0
3
NDT
Unit
V
A
A
A
W
V
mJ
http://onsemi.com
V
(BR)DSS
600 V
R
DS(ON)
MAX
15
W
@ 10 V
N−Channel MOSFET
D (2)
G (1)
S (3)
MARKING DIAGRAMS
4
Drain
YWW
L1
N60ZG
2
1 Drain 3
Gate Source
4
Drain
YWW
L1
N60ZG
1 2 3
Gate Drain Source
Drain
4
AYW
L1N60ZG
G
1
2
3
Gate Drain Source
4
DPAK
CASE 369C
STYLE 2
V/ns
A
°C
°C
1 2
3
4
IPAK
CASE 369D
STYLE 2
1
2
3
= Year
= Work Week
= Pb−Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Limited by maximum junction temperature
2. I
S
= 1.5 A, di/dt
≤
100 A/ms, V
DD
≤
BV
DSS
THERMAL RESISTANCE
Parameter
Junction−to−Case (Drain)
Junction−to−Ambient
NDDL1N60Z
Symbol
R
qJC
R
qJA
Value
5
50
96
62
151
Unit
°C/W
°C/W
Y
WW
G
(Note 4) NDDL1N60Z
(Note 3) NDDL1N60Z−1
(Note 4) NDTL1N60Z
(Note 5) NDTL1N60Z
4
12
3
SOT−223
CASE 318E
STYLE 3
3. Insertion mounted.
4. Surface−mounted on FR4 board using 1” sq. pad size
(Cu area = 1.127” sq. [2 oz] including traces).
5. Surface−mounted on FR4 board using minimum recommended pad size
(Cu area = 0.026” sq. [2 oz]).
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
A
= Assembly Location
Y
= Year
W
= Work Week
01N60 = Specific Device Code
G
= Pb−Free Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
May, 2013
−
Rev. P1
1
Publication Order Number:
NDDL1N60Z/D
NDDL1N60Z, NDTL1N60Z
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Drain−to−Source Leakage Current
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 6)
Gate Threshold Voltage
Negative Threshold Temperature Coef-
ficient
Static Drain-to-Source On Resistance
Forward Transconductance
Input Capacitance (Note 7)
Output Capacitance (Note 7)
Reverse Transfer Capacitance (Note 7)
Total Gate Charge (Note 7)
Gate-to-Source Charge (Note 7)
Gate-to-Drain Charge (Note 7)
Plateau Voltage
Gate Resistance
SWITCHING CHARACTERISTICS
(Note 8)
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Diode Forward Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
V
SD
t
rr
t
a
t
b
Q
rr
V
GS
= 0 V, V
DD
= 30 V
I
S
= 0.8 A, d
i
/d
t
= 100 A/ms
I
S
= 0.4 A, V
GS
= 0 V
T
J
= 25°C
T
J
= 125°C
0.8
0.6
140
25
115
220
nC
ns
1.6
V
t
d(on)
t
r
t
d(off)
t
f
V
DD
= 300 V, I
D
= 0.4 A,
V
GS
= 10 V, R
G
= 0
W
6
5
13
25
ns
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
g
FS
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
V
GP
R
g
V
DS
= 300 V, I
D
= 0.4 A, V
GS
= 10 V
V
DS
= 25 V, V
GS
= 0 V, f = 1 MHz
V
GS
= 10 V, I
D
= 0.2 A
V
DS
= 15 V, I
D
= 0.2 A
V
DS
= V
GS
, I
D
= 50
mA
3
3.75
7.0
13
0.5
94
18
3
5
1
3
6
TBD
V
W
nC
15
4.5
V
mV/°C
W
S
pF
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
I
GSS
V
GS
= 0 V, I
D
= 1 mA
Reference to 25°C, I
D
= 1 mA
V
DS
= 600 V, V
GS
= 0 V
V
GS
=
±20
V
T
J
= 25°C
T
J
= 125°C
600
660
1
50
±100
nA
V
mV/°C
mA
Symbol
Test Conditions
Min
Typ
Max
Unit
CHARGES, CAPACITANCES & GATE RESISTANCES
6. Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
7. Guaranteed by design.
8. Switching characteristics are independent of operating junction temperatures.
ORDERING INFORMATION
Device
NDDL1N60Z−1G
NDDL1N60ZT4G
NDTL1N60ZT1G
Package
IPAK
(Pb-Free, Halogen-Free)
DPAK
(Pb-Free, Halogen-Free)
SOT−223
(Pb-Free, Halogen-Free)
Shipping
†
75 Units / Rail
2500 / Tape & Reel
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
2
NDDL1N60Z, NDTL1N60Z
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE D
A
B
C
A
c2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−−
0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
E
b3
L3
1
4
D
2
3
Z
DETAIL A
H
L4
b2
e
b
0.005 (0.13)
M
c
C
L2
GAUGE
PLANE
H
C
L
L1
DETAIL A
SEATING
PLANE
A1
ROTATED 90 CW
5
SOLDERING FOOTPRINT*
6.20
0.244
3.00
0.118
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
2.58
0.102
5.80
0.228
1.60
0.063
6.17
0.243
SCALE 3:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Order Literature:
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For additional information, please contact your local
Sales Representative
http://onsemi.com
5
NDDL1N60Z/D
嵌入式系统
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