IRLD110, SiHLD110
www.vishay.com
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 5.0 V
6.1
2.6
3.3
Single
D
FEATURES
100
0.54
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• For Automatic Insertion
• End Stackable
• Logic-Level Gate Drive
• R
DS(on)
Specified at V
GS
= 4 V and 5 V
• 175 °C Operating Temperature
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
HVMDIP
G
S
D
Note
*
Lead (Pb)-containing terminations are not RoHS-compliant.
Exemptions may apply.
G
S
N-Channel MOSFET
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The 4 pin DIP package is a low cost machine-insertable
case style which can be stacked in multiple combinations on
standard 0.1" pin centers. The dual drain serves as a thermal
link to the mounting surface for power dissipation levels up
to 1 W.
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
HVMDIP
IRLD110PbF
SiHLD110-E3
IRLD110
SiHLD110
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
a
Linear Derating Factor
Single Pulse Avalanche Energy
b
Avalanche Current
a
Repetitive Avalanche
Energy
a
T
A
= 25 °C
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 25 V, starting T
J
= 25 °C, L = 6.4 mH, R
g
= 25
,
I
AS
= 5.6 A (see fig. 12).
c. I
SD
5.6 A, dI/dt
75 A/μs, V
DD
V
DS
, T
J
175 °C.
d. 1.6 mm from case.
S12-0617-Rev. D, 26-Mar-12
Document Number: 91309
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
V
GS
at 5.0 V
T
A
= 25 °C
T
A
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
100
± 10
1.0
0.70
8.0
0.0083
100
1.0
0.13
1.3
5.5
- 55 to + 175
300
d
W/°C
mJ
A
mJ
W
V/ns
°C
A
UNIT
V
IRLD110, SiHLD110
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
SYMBOL
R
thJA
TYP.
-
MAX.
120
UNIT
°C/W
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 10 V
V
DS
= 100 V, V
GS
= 0 V
V
DS
= 80 V, V
GS
= 0 V, T
J
= 150 °C
V
GS
= 5.0 V
V
GS
= 4.0 V
I
D
= 0.60 A
b
I
D
= 0.50 A
b
MIN.
100
-
1.0
-
-
-
-
-
1.3
-
-
-
-
-
-
-
TYP.
-
0.12
-
-
-
-
-
-
-
250
80
15
-
-
-
9.3
4.7
16
17
4.0
6.0
MAX.
-
-
2.0
± 100
25
250
0.54
0.76
-
-
-
-
6.1
2.6
3.3
-
-
-
-
-
UNIT
V
V/°C
V
nA
μA
S
V
DS
= 50 V, I
D
= 0.60 A
b
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
I
D
= 5.6 A, V
DS
= 80 V,
see fig. 6 and 13
b
pF
V
GS
= 5.0 V
nC
V
DD
= 50 V, I
D
= 5.6 A,
R
g
= 12
,
R
D
= 8.4
,
see fig. 10
b
Between lead,
6 mm (0.25") from
package and center of
die contact
-
-
-
ns
D
-
-
G
nH
-
S
-
-
-
-
-
-
-
-
110
0.50
1.0
A
8.0
2.5
130
0.65
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 1.0 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 5.6 A, dI/dt = 100 A/μs
b
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
S12-0617-Rev. D, 26-Mar-12
Document Number: 91309
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRLD110, SiHLD110
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Vishay Siliconix
20 μs PULSE WIDTH
T
A
= 25 °C
Fig. 1 - Typical Output Characteristics, T
A
= 25 °C
Fig. 3 - Typical Transfer Characteristics
20 μs PULSE WIDTH
T
A
= 175 °C
Fig. 2 - Typical Output Characteristics, T
A
= 175 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
S12-0617-Rev. D, 26-Mar-12
Document Number: 91309
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRLD110, SiHLD110
www.vishay.com
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
T
A
= 25 °C
T
J
= 175 °C
SINGLE
PULSE
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
S12-0617-Rev. D, 26-Mar-12
Document Number: 91309
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRLD110, SiHLD110
www.vishay.com
Vishay Siliconix
V
DS
V
GS
R
g
R
D
D.U.T.
+
-
V
DD
I
D
, Drain Current (A)
10
V
Pulse
width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10 - Switching Time Test Circuit
V
DS
90 %
T
A
, Ambient Temperature (°C)
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 - Maximum Drain Current vs. Ambient Temperature
Fig. 11 - Switching Time Waveforms
Thermal Response (Z
thJA
)
t
1
, Rectangular Pulse Duration (s)
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
S12-0617-Rev. D, 26-Mar-12
Document Number: 91309
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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