IRFR320, IRFU320, SiHFR320, SiHFU320
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Ω)
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
20
3.3
11
Single
D
FEATURES
400
1.8
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• Surface Mount (IRFR320/SiHFR320)
• Straight Lead (IRFU320/SiHFU320)
• Available in Tape and Reel
• Fast Switching
• Ease of Paralleling
• Lead (Pb)-free Available
Available
RoHS*
COMPLIANT
DPAK
(TO-252)
IPAK
(TO-251)
G
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU/SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
are possible in typical surface mount applications.
S
N-Channel
MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
DPAK (TO-252)
IRFR320PbF
SiHFR320-E3
IRFR320
SiHFR320
DPAK (TO-252)
IRFR320TRLPbF
a
SiHFR320TL-E3
a
IRFR320TRL
a
SiHFR320TL
a
DPAK (TO-252)
IRFR320TRPbF
a
SiHFR320T-E3
a
IRFR320TR
a
SiHFR320T
a
DPAK (TO-252)
IRFR320TRRPbF
a
SiHFR320TR-E3
a
IRFR320TRR
a
SiHFR320TR
a
IPAK (TO-251)
IRFU320PbF
SiHFU320-E3
IRFU320
SiHFU320
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS
T
C
= 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Current
a
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
LIMIT
400
± 20
3.1
2.0
12
0.33
0.020
160
3.1
4.2
42
2.5
4.0
- 55 to + 150
260
d
UNIT
V
A
I
DM
Pulsed Drain
Linear Derating Factor
Linear Derating Factor (PCB Mount)
e
E
AS
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
I
AR
E
AR
Repetitive Avalanche Energy
a
Maximum Power Dissipation
T
C
= 25 °C
P
D
e
T
A
= 25 °C
Maximum Power Dissipation (PCB Mount)
Peak Diode Recovery dV/dt
c
dV/dt
Operating Junction and Storage Temperature Range
T
J
, T
stg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 29 mH, R
G
= 25
Ω,
I
AS
= 3.1 A (see fig. 12).
c. I
SD
≤
3.1 A, dI/dt
≤
65 A/µs, V
DD
≤
V
DS
, T
J
≤
150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
W/°C
mJ
A
mJ
W
V/ns
°C
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1
IRFR320, IRFU320, SiHFR320, SiHFU320
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
(PCB Mount)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJA
R
thJC
MIN.
-
-
-
TYP.
-
-
-
MAX.
110
50
3.0
°C/W
UNIT
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
V
GS
= 0 V, I
D
= 250 µA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= ± 20 V
V
DS
= 400 V, V
GS
= 0 V
V
DS
= 320 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 1.9 A
b
V
DS
= 50 V, I
D
= 1.9 A
400
-
2.0
-
-
-
-
1.7
-
0.51
-
-
-
-
-
-
-
-
4.0
± 100
25
250
1.8
-
V
V/°C
V
nA
µA
Ω
S
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
V
GS
= 0 V,
V
DS
= - 25 V,
f = 1.0 MHz, see fig. 5
-
-
-
-
350
120
47
-
-
-
10
14
30
13
4.5
7.5
-
-
-
20
3.3
11
-
-
-
-
-
nH
-
ns
nC
pF
V
GS
= 10 V
I
D
= 3.3 A, V
DS
= 320 V,
see fig. 6 and 13
b
-
-
-
V
DD
= 200 V, I
D
= 3.3 A,
R
G
= 18
Ω,
R
D
= 56
Ω,
see fig. 10
b
-
-
-
Between lead,
6 mm (0.25") from
package and center of
die contact
D
-
G
-
S
-
-
-
-
-
-
-
-
270
1.4
3.1
A
12
1.6
600
3.0
V
ns
µC
G
S
T
J
= 25 °C, I
S
= 3.1 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 3.3 A, dI/dt = 100 A/µs
b
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
≤
300 µs; duty cycle
≤
2 %.
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2
IRFR320, IRFU320, SiHFR320, SiHFU320
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, T
C
= 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFR320, IRFU320, SiHFR320, SiHFU320
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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IRFR320, IRFU320, SiHFR320, SiHFU320
V
DS
V
GS
R
G
R
D
D.U.T.
+
-
V
DD
10
V
Pulse
width
≤
1
µs
Duty factor
≤
0.1
%
Fig. 10a - Switching Time Test Circuit
V
DS
90
%
10
%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
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FPGA/CPLD
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