IRFP31N50L, SiHFP31N50L
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
210
58
100
Single
D
FEATURES
500
0.15
• Super Fast Body Diode Eliminates the Need for
External Diodes in ZVS Applications
• Lower Gate Charge Results in Simpler Drive
Requirements
Available
RoHS*
COMPLIANT
• Enhanced dV/dt Capabilities Offer Improved Ruggedness
• Higher Gate Voltage Threshold Offers Improved Noise
Immunity
• Compliant to RoHS Directive 2002/95/EC
TO-247AC
APPLICATIONS
G
• Zero Voltage Switching SMPS
• Telecom and Server Power Supplies
S
D
G
S
N-Channel MOSFET
• Uninterruptible Power Supplies
• Motor Control Applications
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
TO-247AC
IRFP31N50LPbF
SiHFP31N50L-E3
IRFP31N50L
SiHFP31N50L
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Current
a
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
I
AR
E
AR
T
C
= 25 °C
P
D
dV/dt
T
J
, T
stg
for 10 s
6-32 or M3 screw
LIMIT
500
± 30
31
20
124
3.7
460
31
46
460
19
- 55 to + 150
300
d
10
1.1
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
A
UNIT
V
Linear Derating Factor
Single Pulse Avalanche Energy
b
Repetitive Avalanche
Current
a
Repetitive Avalanche Energy
a
Maximum Power Dissipation
Peak Diode Recovery
dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
J
= 25 °C, L = 1 mH, R
g
= 25
,
I
AS
= 31 A (see fig. 12).
c. I
SD
31 A, dI/dt
422 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91220
S11-0488-Rev. C, 21-Mar-11
www.vishay.com
1
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP31N50L, SiHFP31N50L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thCS
R
thJC
TYP.
-
0.24
-
MAX.
40
-
0.26
UNIT
°C/W
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance
Effective Output Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Internal Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Current
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
V/°C
V
nA
μA
mA
S
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
oss
C
oss
eff.
C
oss eff. (ER)
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 30 V
V
DS
= 500 V, V
GS
= 0 V
V
DS
= 400 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 19 A
b
V
DS
= 50 V, I
D
= 19 A
b
500
-
3.0
-
-
-
-
15
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.28
-
-
-
-
0.15
-
5000
553
59
6630
155
276
200
-
-
-
1.1
28
115
54
53
-
-
5.0
± 100
50
2.0
0.18
-
-
-
-
-
-
-
-
210
58
100
-
-
-
-
-
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
V
DS
= 1.0 V , f = 1.0 MHz
V
GS
= 0 V
V
DS
= 400 V , f = 1.0 MHz
V
DS
= 0 V to 400 V
c
pF
V
GS
= 10 V
I
D
= 31 A, V
DS
= 400 V,
see fig. 7 and 13
b
nC
f = 1 MHz, open drain
V
DD
= 250 V, I
D
= 31 A,
R
g
= 4.3
,
see fig. 10
b
ns
-
-
-
-
-
170
220
570
1.2
7.9
31
A
124
1.5
250
330
860
1.8
12
V
ns
nC
μC
A
G
S
T
J
= 25 °C, I
S
= 31 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 31 A
T
J
= 125 °C, dI/dt = 100 A/μs
b
T
J
= 25 °C, I
S
= 31 A, V
GS
= 0 V
b
T
J
= 125 °C, dI/dt = 100
T
J
= 25 °C
A/μs
b
-
-
-
-
-
-
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Forward Turn-On Time
t
on
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
c. C
oss
eff. is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
.
C
oss
eff. (ER) is a fixed capacitance that stores the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
.
www.vishay.com
2
Document Number: 91220
S11-0488-Rev. C, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP31N50L, SiHFP31N50L
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
100
Top
VGS
15 V
12 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
1000
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
Bottom
100
TJ = 150 °C
10
10
1
5.0 V
0.1
20
μs
PULSE WIDTH
TJ = 25 °C
100
10
TJ = 25 °C
1
0.01
0.1
0.1
4
5
VDS = 50 V
20
μs
PULSE WIDTH
6
8
9
7
VGS, Gate-to-Source Voltage (V)
10
11
1
VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
100
Top
RDS(on), Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current (A)
10
Bottom
VGS
15 V
12 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
3.0
ID = 31 A
2.5
2.0
1
5.0 V
1.5
1.0
0.1
0.5
VGS = 10 V
20 40
60 80 100 120 140 160
0.01
0.1
20
μs
PULSE WIDTH
TJ = 150 °C
10
1
VDS, Drain-to-Source Voltage (V)
100
0.0
- 60 - 40 - 20 0
TJ, Junction Temperature
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91220
S11-0488-Rev. C, 21-Mar-11
www.vishay.com
3
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP31N50L, SiHFP31N50L
Vishay Siliconix
1 000 000
VGS = 0 V,
Ciss = Cgs + Cgd, Cds
Crss = Cgd
Coss = Cds + Cgd
f = 1 MHz
SHORTED
VGS, Gate-to-Source Voltage (V)
20
ID = 31 A
VDS = 400 V
VDS = 250 V
VDS = 100 V
100 000
C, Capacitance (pF)
12
10 000
Ciss
1000
Coss
100
Crss
10
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
8
4
0
0
120
40
80
QG, Total Gate Charge (nC)
160
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
30
1000
25
ISD, Reverse Drain Current (A)
100
TJ = 150 °C
10
20
Energy (µs)
15
10
TJ = 25 °C
1
5
VGS = 0 V
1.4
1.0
0.6
VSD, Source-to-Drain Voltage (V)
1.8
0
0
100
200
300
400
500
600
VDS, Drain-to-Source Voltage (V)
0.1
0.2
Fig. 6 - Output Capacitance Stored Energy vs. V
DS
Fig. 8 - Typical Source Drain Diode Forward Voltage
www.vishay.com
4
Document Number: 91220
S11-0488-Rev. C, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP31N50L, SiHFP31N50L
Vishay Siliconix
R
D
35
V
GS
R
G
V
DS
D.U.T.
+
-
V
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
30
25
20
15
10
ID, Drain Current (A)
Fig. 10a - Switching Time Test Circuit
V
DS
90 %
5
0
25
50
75
100
125
150
TC, Case Temperature (°C)
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 - Maximum Drain Current vs. Case Temperature
1
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t1/ t2
2. Peak TJ = PDM x ZthJC + TC
0.01
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
V
DS
15 V
t
p
V
DS
L
Driver
R
G
20 V
t
p
D.U.T
I
AS
0.01
Ω
+
A
- V
DD
A
I
AS
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91220
S11-0488-Rev. C, 21-Mar-11
Fig. 12b - Unclamped Inductive Waveforms
www.vishay.com
5
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
