SiC417
Vishay Siliconix
microBUCK
TM
SiC417
10-A, 28-V Integrated Buck Regulator with Programmable LDO
DESCRIPTION
The Vishay Siliconix SiC417 is an advanced stand-alone
synchronous buck regulator featuring integrated power
MOSFETs, bootstrap diode, and a programmable LDO in a
space-saving MLPQ 5 x 5 - 32 pin package.
The SiC417 is capable of operating with all ceramic solutions
and switching frequencies up to 1 MHz. The programmable
frequency,
synchronous operation
and
selectable
power-save allow operation at high efficiency across the full
range of load current. The internal programmable LDO may
be used to supply 5 V for the gate drive circuits or it may be
bypassed with an external 5 V for optimum efficiency and
used to drive external N-channel MOSFETs or other loads.
Additional features include cycle-by-cycle current limit,
voltage soft-start, under-voltage protection, programmable
over-current protection, soft shutdown and selectable
power-save. The Vishay Siliconix SiC417 also provides an
enable input and a power good output.
FEATURES
• High efficiency > 92 %
• Internal power MOSFETs:
High-side R
DS(ON)
= 27 mΩ
Low-side R
DS(ON)
= 9 mΩ
• Integrated bootstrap diode
• Integrated configurable 150 mA LDO with bypass logic
• Temperature compensated current limit
• Pseudo fixed-frequency adaptive on-time control
• All ceramic solution enabled
• Programmable input UVLO threshold
• Independent enable pin for switcher and LDO
• Selectable ultra-sonic power-save mode
• Internal soft-start and soft-shutdown
• 1 % internal reference voltage
• Power good output and over voltage protection
• Halogen-free according to IEC 61249-2-21 definition
•
Compliant to RoHS directive 2002/95/EC
PRODUCT SUMMARY
Input Voltage Range
Output Voltage Range
Operating Frequency
Continuous Output Current
Peak Efficiency
Package
3 V to 28 V
0.5 V to 5.5 V
200 kHz to 1 MHz
10 A
95 % at 300 kHz
MLPQ 5 mm x 5 mm
APPLICATIONS
•
•
•
•
•
•
Notebook, desktop and server computers
Digital HDTV and digital consumer applications
Networking and telecommunication equipment
Printers, DSL and STB applications
Embedded applications
Point of load power supplies
TYPICAL APPLICATION CIRCUIT
V5V
V
LDO
FBL
EN/PSV
P
GOOD
ENL
t
ON
A
GND
30
1
FB DL
14
PWM
Controller
DH
12
V
IN
3
7
2
EN-P
SAVE
P
GOOD
EN-LDO
29
26
32
31
6
BST
8
LX
13
27
I
LIM
15
P
GND
5
V
OUT
Document Number: 69062
S10-1367-Rev. D, 14-Jun-10
www.vishay.com
1
SiC417
Vishay Siliconix
PIN CONFIGURATION
EN/PSV
P
GOOD
A
GND
ENL
I
LIM
t
ON
LX
LX
FB
FBL
V5V
A
GND
V
OUT
V
IN
V
LDO
BST
PAD 2
V
IN
35
PAD 1
A
GND
34
PAD 3
LX 33
LX
LX
P
GND
P
GND
P
GND
P
GND
P
GND
P
GND
DH
LX
DL
P
GND
PIN DESCRIPTION
Pin Number
1
2
3
4, 30, PAD 1
5
6, 9 - 11, PAD 2
7
8
12
14
13, 23 - 25, 28,
PAD 3
15-22
26
27
29
31
32
Symbol
FB
FBL
V5V
A
GND
V
OUT
V
IN
V
LDO
BST
DH
DL
LX
P
GND
P
GOOD
I
LIM
EN/PSV
t
ON
ENL
Description
Feedback input for switching regulator. Connect to an external resistor divider from output to program the
output voltage.
Feedback input for the LDO. Connect to an external resistor divider from V
LDO
to program the V
LDO
output.
5 V power input for internal analog circuits and gate drives. Connect to external 5 V supply or configure the
LDO for 5 V and connect to V
LDO
.
Analog ground.
Output voltage input to the SiC417. Additionally, may be used to bypass LDO to supply V
LDO
directly.
Input supply voltage.
LDO output.
Bootstrap pin. A capacitor is connected between BST to LX to develop the floating voltage for the high-side
gate drive.
High-side gate drive - do not connect this pin.
Low-side gate drive - do not connect this pin.
Switching (Phase) node.
Power ground.
Open-drain power good indicator. High impedance indicates power is good. An external pull-up resistor is
required.
Current limit sense point - to program the current limit connect a resistor from I
LIM
to LX.
Tri-state pin. Enable input for switching regulator. Connect EN to A
GND
to disable the switching regulator.
Float pin for forced continuous and pull high for power-save mode.
On-time set input. Set the on-time by a series resistor to the input supply voltage.
Enable input for the LDO. Connect ENL to A
GND
to disable the LDO.
ORDERING INFORMATION
Part Number
SiC417CD-T1-E3
SiC417DB
Package
MLPQ55-32
Evaluation board
www.vishay.com
2
P
GND
V
IN
V
IN
V
IN
Document Number: 69062
S10-1367-Rev. D, 14-Jun-10
SiC417
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
3
V5V
A
GND
1.20.21
PAD 1
Reference
Control and Status
DL
V5V
PGD
26
EN/PSV
29
6, 9 - 11 PAD 3
V
IN
V
IN
V5V
BST
8
Soft Start
LX
13, 23 - 25
28, PAD 3
V5V
P
GND
Zero Cross
Detector
Valley
1 - Limit
V
LDO
7
FBL
2
32
A
Y B
FB
1
t
ON
31
V
OUT
5
+
-
FB Comparator
Bypass Comparator
Gate Drive
Control
15-22
I
LIM
27
V
IN
LDO
ENL
MUX
ABSOLUTE MAXIMUM RATINGS
T
A
= 25 °C, unless otherwise noted
Parameter
LX to P
GND
Voltage
LX to P
GND
Voltage (transient - 100 ns)
V
IN
to P
GND
Voltage
V
EN
Maximum Voltage
BST Bootstrap to LX; V5V to P
GND
A
GND
to P
GND
EN/PSV, P
GOOD
, I
LIM
, V
OUT
, V
LDO
, FB, FBL to GND
t
ON
to P
GND
BST to P
GND
V
AG-PG
Symbol
V
LX
V
LX
V
IN
V
EN
Min.
- 0.3
-2
- 0.3
- 0.3
- 0.3
- 0.3
- 0.3
- 0.3
- 0.3
Max.
+ 30
+ 30
+ 30
V
IN
+ 6.0
+ 0.3
+ (V5V + 0.3)
+ (V5V - 1.5)
+ 35
V
Unit
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter
Input Voltage
V5V to P
GND
V
OUT
to P
GND
Symbol
V
IN
V5V
V
OUT
Min.
3.0
4.5
0.5
Typ.
Max.
28
5.5
5.5
V
Unit
Note:
For proper operation, the device should be used within the recommended conditions.
THERMAL RESISTANCE RATINGS
Parameter
Storage Temperature
Maximum Junction Temperature
Operation Junction Temperature
Symbol
T
STG
T
J
T
J
Min.
- 40
-
- 25
Typ.
Max.
+ 150
150
+ 125
°C
Unit
Document Number: 69062
S10-1367-Rev. D, 14-Jun-10
www.vishay.com
3
SiC417
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Thermal Resistance, Junction-to-Ambient
b
High-Side MOSFET
Low-Side MOSFET
PWM Controller and LDO Thermal Resistance
Peak IR Reflow Temperature
T
Reflow
-
25
20
50
260
°C/W
°C
Notes:
a. This device is ESD sensitive. Use of standard ESD handling precautions is required.
b. Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specififed in the Electrical Characteristicsw section is not recommended.
ELECTRICAL SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= 12 V, V5V = 5 V, T
A
= + 25 °C for typ.,
- 25 °C to + 85 °C for min. and max.,
T
J
= < 125 °C
Parameter
Input Supplies
V
IN
Input Voltage
V5V Voltage
V
IN
UVLO Threshold Voltage
a
V
IN
UVLO Hysteresis
V5V UVLO Threshold Voltage
V5V UVLO Hysteresis
V
IN
Supply Current
Symbol
V
IN
V5V
V
IN_UV+
V
IN_UV-
V
IN_UV_HY
V
5V_UV+
V
5V_UV-
V
5V_UV_HY
Min.
3
4.5
Typ.
Max.
28
5.5
Unit
Sensed at ENL pin, rising edge
Sensed at ENL pin, falling edge
EN/PSV = High
Measured at V5V pin, rising edge
Measured at V5V pin, falling edge
EN/PSV, ENL = 0 V, V
IN
= 28 V
2.4
2.235
3.7
3.5
2.6
2.4
0.2
3.9
3.6
0.3
8.5
130
3
2
2.95
2.565
4.1
3.75
20
µA
7
mA
V
I
IN
Standby mode:
ENL = V5V, EN/PSV = 0 V
EN/PSV, ENL = 0 V
EN/PSV = V5V, no load (f
SW
= 25 kHz),
V
FB
> 500 mV
b
f
SW
= 250 kHz, EN/PSV = floating, no load
b
V5V Supply Current
I
5V
10
0.495
200
10
0.5
0.505
1000
V
kHz
Ω
Controller
F
B
On-Time Threshold
Frequency Range
Bootstrap Switch Resistance
Timing
On-Time
Minimum On-Time
b
Minimum Off-Time
b
Soft Start
Soft Start Time
b
Analog Inputs/Outputs
V
OUT
Input Resistance
Current Sense
Zero-Crossing Detector Threshold Voltage
Power Good
Power Good Threshold Voltage
Start-Up Delay Time
Fault (noise-immunity) Delay Time
b
Power Good Leakage Current
Power Good On-Resistance
PG_V
TH
PG_T
d
PG_I
CC
PG_I
LK
PG_R
DS-ON
Internal reference 500 mV
V
EN
= 0 V
V
EN
= 0 V
V
EN
= 0 V
V
EN
= 0 V
10
- 10 %
2
5
1
+ 20 %
V
ms
µs
µA
Ω
V
Sense-th
LX-P
GND
-3
0
+3
mV
R
O-IN
500
kΩ
t
SS
I
OUT
= I
LIM
/2
0.85
ms
t
ON
t
ON
t
OFF
Continuous mode operation V
IN
= 15 V,
V
OUT
= 5 V, f
SW
= 300 kHz, R
ton
= 133 kΩ
999
1110
50
250
1220
ns
V
FB-TH
F
PWM
Static V
IN
and load, - 40 °C to + 85 °C
continuous mode
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Document Number: 69062
S10-1367-Rev. D, 14-Jun-10
SiC417
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= 12 V, V5V = 5 V, T
A
= + 25 °C for typ.,
- 25 °C to + 85 °C for min. and max.,
T
J
= < 125 °C
Parameter
Fault Protection
I
LIM
Source Current
Valley Current Limit
I
LIM
Comparator Offset Voltage
Output Under-Voltage Fault
Smart Power-Save Protection
Threshold Voltage
b
Over-Voltage Protection Threshold
Over-Voltage Fault Delay
Logic Inputs/Outputs
Logic Input High Voltage
Logic Input Low Voltage
EN/PSV Input Bias Current
ENL Input Bias Current
FBL, FB Input Bias Current
Linear Dropout Regulator
FBL Accuracy
LDO Current Limit
V
LDO
to V
OUT
Switch-Over Threshold
c
V
LDO
to V
OUT
Non-Switch-Over
LDO Drop Out Voltage
d
Threshold
c
V
LDO
to V
OUT
Switch-Over Resistance
b
b
Symbol
I
LIM
Min.
Typ.
10
Max.
Unit
µA
R
ILIM
= 5.9 kΩ
V
ILM-LK
V
OUV_Fault
P
SAVE_VTH
With
respect to A
GND
V
FB
with respect to Internal 500 mV reference,
8 consecutive clocks
V
FB
with respect to internal 500 mV reference
V
FB
with respect to internal 500 mV reference
t
OV-Delay
T
Shut
V
IN+
V
IN-
I
EN-
FBL_I
LK
FBL
ACC
LDO_I
LIM
V
LDO-BPS
V
LDO-NBPS
R
LDO
V
OUT
= 5 V
From V
IN
to V
VLDO
, V
VLDO
= + 5 V,
I
VLDO
= 100 mA
10 °C hysteresis
6
- 10
8
0
- 25
+ 10
+ 20
5
150
10
+ 10
A
mV
%
%
µs
°C
Over Temperature Shutdown
EN, ENL, PSV
EN/PSV = V5V or A
GND
V
IN
= 28 V
FBL, FB = V5V or A
GND
V
LDO
load = 10 mA
Start-up and foldback, V
IN
= 12 V
Operating current limit, V
IN
= 12 V
2
0.4
- 10
11
-1
0.735
135
- 140
- 450
2
1.2
0.75
85
200
+ 140
+ 450
+ 10
18
+1
0.765
V
µA
V
mA
mV
Ω
V
Notes:
a. V
IN UVLO
is programmable using a resistor divider from V
IN
to ENL to A
GND
. The ENL voltage is compared to an internal reference.
b. Guaranteed by design.
c. The switch-over threshold is the maximum voltage diff erential between the V
LDO
and V
OUT
pins which ensures that V
LDO
will internally
switch-over to V
OUT
. The non-switch-over threshold is the minimum voltage diff erential between the V
LDO
and V
OUT
pins which ensures that
V
LDO
will not switch-over to V
OUT
.
d. The LDO drop out voltage is the voltage at which the LDO output drops 2 % below the nominal regulation point.
ELECTRICAL CHARACTERISTICS
100
95
90
85
Efficiency (%)
V
IN
= 9
V
V
IN
= 19
V
80
75
70
65
60
55
50
0
1
2
3
4
5
I
OUT
(A)
6
7
8
9
10
Efficiency vs. Output Current (V
OUT
= 1.2 V)
Document Number: 69062
S10-1367-Rev. D, 14-Jun-10
www.vishay.com
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