Si9183
Vishay Siliconix
High-Performance, Size Saving 150-mA CMOS LDO Regulator
FEATURES
D
D
D
D
D
D
D
D
D
Low 135-mV Dropout at 150-mA Load
Guaranteed 150-mA Output Current
300-mA Peak Output Current Capability
Uses Low ESR Ceramic Output Capacitor
Fast Load And Line Transient Response
Low Output Noise
1-mA Maximum Shutdown Current
Built-in Short Circuit And Thermal Protection
Fixed 1.5-V, 1.8-V, 2.0-V, 2.5-V, 2.7-V, 2.8-V, 2.85-V,
3.0-V, 3.3-V, 3.6-V, 5.0-V or Adjustable Output
Voltage Options (Version B)
D
Thin SOT-23 5-Pin Package
APPLICATIONS
D
D
D
D
D
D
Battery Powered Portable Systems
Cellular Phones
PDAs, Palmtops
Pagers
Post Regulators for Multi-Output Converters
Notebook Computers
DESCRIPTION
The Si9183 is a high performance yet size saving 150-mA
CMOS LDO (low dropout) voltage regulator. Its ultra low
ground current and dropout voltage prolong battery life in
portable electronics. The device provides LINE/LOAD
transient response and ripple rejection superior to that of
Bipolar or BiCMOS LDO regulators. It is designed to maintain
regulation while delivering 300-mA peak current. The Si9183
drives lower cost ceramic, as well as tantalum, output
capacitors. Stability is guaranteed from maximum load current
down to 0-mA load. An external noise bypass capacitor
connected to the device’s C
BP
pin will reduce the LDO’s
self-noise for low noise applications. The Si9183 includes a
shutdown feature that allows users to completely disable the
device and save power when no output is required.
The Si9183, in Thin SOT23-5 packaging, is available in two
versions (Version A or B). Version A offers low noise
performance, while Version B features adjustable output
voltage.
The Si9183 is available in both standard and lead (Pb)-free
packages.
TYPICAL APPLICATIONS CIRCUITS
Si9183-A
V
IN
1
mF
2
GND
1
V
IN
V
OUT
5
V
OUT
2.2
mF
V
IN
1
mF
2
1
Si9183-B
V
IN
V
OUT
5
V
OUT
2.2
mF
GND
SD
ON
OFF
3
SD
BP
4
0.1
mF
SD
ON
OFF
3
SD
FB
4
Thin SOT-23, 5-Lead
Thin SOT-23, 5-Lead
FIGURE 1.
Version A with Low Output Noise
FIGURE 2.
Version B with Adjustable Output
Document Number: 71258
S-40593—Rev. E, 29-Mar-04
www.vishay.com
1
Si9183
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
SD Input Voltage, V
SD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
IN
Output Current, I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Output Voltage, V
OUT
. . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
O(nom)
+ 0.3 V
Maximum Junction Temperature, T
J(max)
. . . . . . . . . . . . . . . . . . . . . . . 150_C
Storage Temperature, T
STG
. . . . . . . . . . . . . . . . . . . . . . . . . .
−65_C
to 125_C
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Power Dissipation (Package)
a
, b
5-Pin SOT-23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555 mW
Thermal Impedance (Q
JA
)
5-Pin SOT-23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
_C/W
Notes
a. Device mounted with all leads soldered or welded to multi-layer (1S2P)
JEDEC board, horizontal orientation.
b. Derate 5.5 mW/_C above T
A
= 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V to 6 V
Output Voltage, V
OUT
(Adjustable Version) . . . . . . . . . . . . . . . . . . 1.5 V to 5 V
SD Input Voltage, V
SD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
IN
Operating Ambient Temperature, T
A
. . . . . . . . . . . . . . . . . . . .
−40_C
to 85_C
Operating Junction Temperature, T
J
. . . . . . . . . . . . . . . . . . .
−40_C
to 125_C
C
IN
= 1
mF,
C
OUT
= 2.2
mF
(ceramic, X5R or X7R type) , C
BP
= 0.1
mF
(ceramic)
C
OUT
Range = 1
mF
to 10
mF
("20% tolerance,
"20%
over temperature; ESR = 0.4 to 4
W
at dc to 100 kHz, 0 t0 0.4
W
> 100 kHz) )
SPECIFICATIONS (T
A
= 25_C)
Test Conditions
Unless Otherwise Specified
Parameter
Input Voltage Range
Output Voltage Range
Output Voltage Accuracy
(Fixed Versions)
Feedback Voltage (ADJ version)
Line Regulation
(Except 5-V Version)
Line Regulation (5-V Version)
Line Regulation (ADJ Version)
V
OUT
Limits
−40
to 85_C
Symbol
V
IN
V
IN
= V
OUT(nom)
+ 1 V I
OUT
= 1 mA
V,
A
C
IN
= 1
mF,
C
OUT
= 2.2
mF,
V
SD
= 1.5 V
Temp
a
Full
Min
b
2
1.5
−1.5
−2.5
1.188
1.176
−0.18
−0.18
−0.18
−0.18
Typ
c
Max
b
6
5
1.5
2.5
Unit
Adjustable Version
1 mA
v
I
OUT
v
150 mA
Full
Room
Full
Room
Full
V
% V
O(
O(nom)
)
V
V
FB
From V
IN
= V
OUT(nom)
+ 1 V
to V
OUT(nom)
+ 2 V
From V
IN
= 5.5 V to 6 V
V
OUT
= 1.5 V, From V
IN
= 2.5 V to 3.5 V
V
OUT
= 5 V, From V
IN
= 5.5 V to 6 V
I
OUT
= 10 mA
1.215
1.240
1.252
0.18
0.18
0.18
0.18
Full
Full
Full
Full
Room
Room
Full
Room
Full
Room
Room
Full
Full
Room
Room
Room
Room
V
IN
DV
OUT
100
V
OUT(nom)
%/V
1
135
180
235
20
170
220
320
380
mV
Dropout Voltage
d
@V
OUT
w
2.5 V)
Dropout Voltage
d
(@V
OUT
t
2.5 V, V
IN
w
2 V)
V
IN
−
V
OUT
I
OUT
= 150 mA
I
OUT
= 150 mA
I
OUT
= 0 mA
V
IN
−
V
OUT
150
500
900
0.1
2
250
300
300
100
1
100
mA
nA
mA
mV
(rms)
m
mA
Ground Pin Current
I
GND
I
IN(off)
I
FB
I
O(peak)
e
N
I
OUT
= 150 mA
V
SD
= 0 V
V
FB
= 1.2 V
V
OUT
w
0.95 x V
OUT(nom)
, t
pw
= 2 ms
BW = 50 Hz to 100 kHz
I
OUT
= 150 mA
w/o C
BP
C
BP
= 0.1
mF
Shutdown Supply Current
FB Pin Current
Peak Output Current
Output Noise Voltage
www.vishay.com
2
Document Number: 71258
S-40593—Rev. E, 29-Mar-04
Si9183
Vishay Siliconix
SPECIFICATIONS (T
A
= 25_C)
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V
IN
= V
OUT(nom)
+ 1 V, I
OUT
= 1 mA
C
IN
= 1
mF,
C
OUT
= 2.2
mF,
V
SD
= 1.5 V
Limits
−40
to 85_C
Temp
a
Room
Room
Room
Room
Room
Room
Room
Min
b
Typ
c
60
40
30
10
30
5
1000
Max
b
Unit
f = 1 kHz
Ripple Rejection
pp
j
DV
OUT
/DV
IN
I
OUT
= 150 mA
f = 10 kHz
f = 100 kHz
Dynamic Line Regulation
Dynamic Load Regulation
V
OUT
Turn On Time
Turn-On-Time
DV
O(line)
DV
O(load)
t
ON
V
IN
: V
OUT(nom)
+ 1 V to V
OUT(nom)
+ 2 V
t
R
/t
F
= 5
ms,
I
OUT
= 150 mA
I
OUT
: 1 mA to 150 mA, t
R
/t
F
= 2
ms
V
IN
= 4.3 V
V
OUT
= 3.3 V
w/o C
BP
Cap
C
BP
= 0.1
mF
dB
mV
ms
Thermal Shutdown
Thermal Shutdown Junction Temp
Thermal Hysteresis
Short Circuit Current
t
J(s/d)
t
HYST
I
SC
V
OUT
= 0 V
Room
Room
Room
165
20
400
_C
mA
Shutdown Input
SD Input Voltage
V
IH
V
IL
I
IL
I
IH
V
HYST
High = Regulator ON (Rising)
Low = Regulator OFF (Falling)
V
SD
= 0 V, Regulator OFF
V
SD
= 6 V, Regulator ON
Full
Full
Room
Room
Full
0.01
1.0
100
1.2
V
IN
0.4
V
SD Input Current
e
Shutdown Hysteresis
mA
mV
Notes
a. Room = 25_C, Full =
−40
to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at V
OUT
w
2 V are measured at
V
OUT
= 2.5 V, while typical values for dropout voltage at V
OUT
< 2 V are measured at V
OUT
= 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that V
IN
does not not drop below 2.0 V.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.
V
OUT
is defined as the output voltage of the DUT at 1 mA.
Document Number: 71258
S-40593—Rev. E, 29-Mar-04
www.vishay.com
3
Si9183
Vishay Siliconix
TIMING WAVEFORMS
V
IN
t
ON
V
NOM
0.95 V
NOM
V
OUT
FIGURE 3.
Timing Diagram for Power-Up
PIN CONFIGURATION
Thin SOT-23, 5-Pin
V
IN
1
5
V
OUT
GND
2
BP (Version A)
FB (Version B)
SD
3
4
PIN DESCRIPTION
Pin Number
1
2
3
4 (Version A)
4 (Version B)
5
Name
V
IN
GND
SD
BP
FB
V
OUT
Ground pin. Local ground for C
BP
and C
OUT
.
Function
Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground.
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to V
IN
if unused.
Noise bypass pin. For low noise applications, a 0.1-mF or larger ceramic capacitor should be connected from this pin to
ground.
Connect to divided output voltage to adjust the regulation point.
Output voltage. Connect C
OUT
between this pin and ground.
www.vishay.com
4
Document Number: 71258
S-40593—Rev. E, 29-Mar-04
Si9183
Vishay Siliconix
ORDERING INFORMATION
Part Number
Si9183DT-15-T1
Si9183DT-18-T1
Si9183DT-20-T1
Si9183DT-25-T1
Si9183DT-27-T1
Si9183DT-28-T1
Si9183DT-285-T1
Si9183DT-30-T1
Si9183DT-33-T1
Si9183DT-36-T1
Si9183DT-50-T1
Si9183DT-AD-T1
NOTE: LL = Lot Code
Lead (Pb)-Free
Part Number
Si9183DT-15-T1—E3
Si9183DT-18-T1—E3
Si9183DT-20-T1—E3
Si9183DT-25-T1—E3
Si9183DT-27-T1—E3
Si9183DT-28-T1—E3
Si9183DT-285-T1—E3
Si9183DT-30-T1—E3
Si9183DT-33-T1—E3
Si9183DT-36-T1—E3
Si9183DT-50-T1—E3
Si9183DT-AD-T1—E3
Marking
A1LL
A2LL
A3LL
A4LL
B1LL
A5LL
B3LL
A6LL
A7LL
B2LL
A8LL
A9LL
Voltage
1.5 V
1.8 V
2.0 V
2.5 V
2.7 V
2.8 V
2.85 V
3.0 V
3.3 V
3.6 V
5.0 V
Adjustable
Temperature Range
Package
−40
to 85_C
Thin
SOT23-5
Eval Kit
Si9183DB
Temperature Range
−40
to 85_C
Board Type
Surface Mount
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
300
250
200
150
100
50
0
0
60
120
180
240
300
I
LOAD (mA)
375
350
V
OUT
= 2.5 V
325
300
275
250
225
200
175
150
125
100
75
50
25
0
−50 −25
0
0.5
V
OUT
(V)
1.5
Dropout Voltage vs. Load Current
V
OUT
= 2.5 V
2.5
V
IN
−
V
OUT
Transfer Characteristic
R
LOAD
= 250
W
2.0
R
LOAD
= 16.6
W
V
DROP
(mV)
1.0
0.0
0
1
2
3
V
IN
(V)
500
I
OUT
= 300 mA
400
Dropout Voltage (mV)
4
5
6
Dropout Voltage vs. Temperature
Dropout Voltage vs. V
OUT
V
DROP
(mV)
300
I
OUT
= 300 mA
200
I
OUT
= 75 mA
100
I
OUT
= 10 mA
0
1.0
1.5
2.0
2.5
3.0
V
OUT
www.vishay.com
3.5
4.0
4.5
5.0
I
OUT
= 150 mA
I
OUT
= 150 mA
I
OUT
= 75 mA
I
OUT
= 10 mA
I
OUT
= 0 mA
25
50
75
100
125
150
Junction Temperature (_C)
Document Number: 71258
S-40593—Rev. E, 29-Mar-04
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
