Si9181
Vishay Siliconix
Micropower 350-mA CMOS LDO Regulator
With Error Flag/Power-On-Reset
FEATURES
Low 150-mV Dropout at 350-mA Load
Guaranteed 350-mA Output Current
600-mA Peak Output Current Capability
Uses Low ESR Ceramic Output Capacitor
Fast Load and Line Transient Response
Only 100-mV(rms) Noise With Noise Bypass
Capacitor
D
1-mA Maximum Shutdown Current
D
Built-in Short Circuit and Thermal Protection
D
Out-Of-Regulation Error Flag (Power Good or POR)
D
D
D
D
D
D
D
Fixed 1.5-V, 1.8-V, 2.0-V, 2.5-V, 2.8-V, 2.85-V, 2.9 V,
3.0-V, 3.3-V, 5.0-V, or Adjustable Output Voltage
Options
D
Other Output Voltages Available by Special Order
APPLICATIONS
D
Cellular Phones
D
Laptop and Palm Computers
D
PDA, Digital Still Cameras
DESCRIPTION
The Si9181 is a 350-mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si9181 offers line/load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO regulators.
The device is designed to maintain regulation while delivering
600-mA peak current. This is useful for systems that have high
surge current upon turn-on. The Si9181 is designed to drive
the lower cost ceramic, as well as tantalum, output capacitors.
The device is guaranteed stable from maximum load current
down to 0-mA load. In addition, an external noise bypass
capacitor connected to the device’s C
NOISE
pin will lower the
LDO’s output noise for low noise applications.
The Si9181 also includes an out-of-regulation error flag. When
the output voltage is 5% below its nominal output voltage, the
error flag output goes low. If a capacitor is connected to the
device’s delay pin, the error flag output pin will generate a
delayed power-on-reset signal.
The Si9181 is available in both standard and lead (Pb)-free
packages.
TYPICAL APPLICATIONS CIRCUITS
1
2
3
V
IN
2.2
mF
GND
4
8
7
6
5
2.2
mF
V
OUT
V
IN
2.2
mF
GND
1
2
3
4
8
7
6
5
V
OUT
2.2
mF
C
NOISE
DELAY
GND
V
IN
SD
ERROR
SENSE/ADJ
V
OUT
C
NOISE
DELAY
GND
V
IN
SD
ERROR
SENSE/ADJ
V
OUT
Si9181
FIGURE 1.
Fixed Output
Si9181
FIGURE 2.
Adjustable Output
1
0.1
mF
2
0.1
mF
3
4
C
NOISE
DELAY
GND
V
IN
SD
ERROR
8
7
6
5
2.2
mF
1 MW
ON/OFF
POR
V
OUT
SENSE/ADJ
V
OUT
V
IN
2.2
mF
GND
Si9181
FIGURE 3.
Low Noise, Full Features Application
Document Number: 71119
S-40694—Rev. D, 19-Apr-04
www.vishay.com
1
Si9181
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
SD Input Voltage, V
SD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
IN
Output Current, I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Output Voltage, V
OUT
. . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
O(nom)
+ 0.3 V
Maximum Junction Temperature, T
J(max)
. . . . . . . . . . . . . . . . . . . . . . . 150_C
Storage Temperature, T
STG
. . . . . . . . . . . . . . . . . . . . . . . . . .
−55_C
to 150_C
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Power Dissipation (Package)
a
8-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 833 mW
Thermal Impedance (Q
JA
)
8-Pin TSSOP
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 8.3 mW/_C above T
A
= 25_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V to 6 V
Output Voltage, V
OUT
(Adjustable Version) . . . . . . . . . . . . . . . . . . 1.5 V to 5 V
SD Input Voltage, V
SD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
IN
C
IN
= 2.2
mF,
C
OUT
= 2.2
mF
(ceramic, X5R or X7R type) , C
NOISE
= 0.1
mF
(ceramic)
C
OUT
Range = 1
mF
to 10
mF
("10%, x5R or x7R type)
C
IN
w
C
OUT
Operating Ambient Temperature, T
A
. . . . . . . . . . . . . . . . . . . .
−40_C
to 85_C
Operating Junction Temperature, T
J
. . . . . . . . . . . . . . . . . . .
−40_C
to 125_C
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
Output Voltage Range
Output Voltage Accuracy
(Fixed Versions)
Feedback Voltage (ADJ Version)
Line Regulation
(Except 5-V Version)
Line Regulation (5-V Version)
Line Regulation (ADJ Version)
V
IN
DV
OUT
100
V
OUT(nom)
V
OUT
Limits
−40
to 85_C
Symbol
V
IN
= V
OUT(nom)
+ 1 V I
OUT
= 1 mA
V,
A
C
IN
= 2.2
mF,
C
OUT
= 2.2
mF,
V
SD
= 1.5 V
Temp
a
Full
Room
Full
Room
Full
Min
b
1.5
−1.5
−2.5
1.191
1.179
−0.18
−0.18
−0.18
−0.18
Typ
c
Max
b
5
1.5
2.5
Unit
V
% V
O(
O(nom)
)
V
Adjustable Version
1 mA
v
I
OUT
v
350 mA
V
ADJ
From V
IN
= V
OUT(nom)
+ 1 V
to V
OUT(nom)
+ 2 V
From V
IN
= 5.5 V to 6 V
V
OUT
= 1.5 V, From V
IN
= 2.5 V to 3.5 V
V
OUT
= 5 V, From V
IN
= 5.5 V to 6 V
I
OUT
= 10 mA
1.215
1.239
1.251
0.18
0.18
0.18
0.18
Full
Full
Full
Full
Room
Room
Room
Full
Room
Room
Full
Room
Room
Full
Room
Full
%/V
5
85
150
20
180
400
550
mV
Dropout Voltage
d
(@V
OUT
w
2 V)
V
IN
−
V
OUT
Dropout
(@V
OUT
t
2 V, V
IN
w
2 V)
Voltage
d
I
OUT
= 200 mA
I
OUT
= 350 mA
I
OUT
= 200 mA
I
OUT
= 350 mA
I
OUT
= 0 mA
I
OUT
= 200 mA
I
OUT
= 350 mA
170
290
250
425
575
150
1000
1500
1500
2800
Document Number: 71119
S-40694—Rev. D, 19-Apr-04
m
mA
Ground Pin Current
I
GND
www.vishay.com
2
Si9181
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
Shutdown Supply Current
ADJ Pin Current
Peak Output Current
Output Noise Voltage
Limits
−40
to 85_C
Symbol
I
IN(off)
I
ADJ
I
O(peak)
e
N
V
IN
= V
OUT(nom)
+ 1 V I
OUT
= 1 mA
V,
A
C
IN
= 2.2
mF,
C
OUT
= 2.2
mF,
V
SD
= 1.5 V
Temp
a
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Min
b
Typ
c
0.1
5
Max
b
1
100
Unit
mA
nA
mA
V
SD
= 0 V
ADJ = 1.2 V
V
OUT
w
0.95 x V
OUT(nom)
, t
pw
= 2 ms
BW = 50 Hz to 100 kHz
I
OUT
= 150 mA
w/o C
NOISE
C
NOISE
= 0.1
mF
f = 1 kHz
f = 10 kHz
f = 100 kHz
600
200
100
60
60
40
10
30
5
2
mV
(rms)
Ripple Rejection
pp
j
DV
OUT
/DV
IN
I
OUT
= 150 mA
dB
Dynamic Line Regulation
Dynamic Load Regulation
V
OUT
Turn On Time
Turn-On-Time
DV
O(line)
DV
O(load)
t
ON
V
IN
: V
OUT(nom)
+ 1 V to V
OUT(nom)
+ 2 V
t
R
/t
F
= 5
ms,
I
OUT
= 350 mA
I
OUT
: 1 mA to 150 mA, t
R
/t
F
= 2
ms
V
IN
= 4.3 V
V
OUT
= 3.3 V
w/o C
NOISE
Cap
C
NOISE
= 0.1
mF
mV
ms
mS
Thermal Shutdown
Thermal Shutdown Junction Temp
Thermal Hysteresis
Short Circuit Current
t
J(s/d)
t
HYST
I
SC
V
OUT
= 0 V
Room
Room
Room
165
20
800
_C
mA
Shutdown Input
SD Input Voltage
V
IH
V
IL
I
IH
I
IL
V
HYST
High = Regulator ON (Rising)
Low = Regulator OFF (Falling)
V
SD
= 0 V, Regulator OFF
V
SD
= 6 V, Regulator ON
Full
Full
Room
Room
Full
0.01
1.0
100
1.5
V
IN
0.4
V
SD Input Current
e
Shutdown Hysteresis
mA
mV
Error Output
Output High Leakage
Output Low
Voltage
g
Power_Good Trip Threshold
f, h
(Rising)
Hysteresis
f
Delay Pin Current Source
I
OFF
V
OL
V
TH
V
HYST
I
DELAY
ERROR = V
OUT(nom)
I
SINK
= 2 mA
Full
Full
Full
Room
Room
1.2
0.93 x
V
OUT
0.95 x
V
OUT
2% x
V
OUT
2.2
3.0
mA
0.01
2
0.4
0.97 x
V
OUT
V
mA
Notes
a. Room = 25_C, Full =
−40
to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at V
OUT
w
2 V are measured at
V
OUT
= 3.3 V, while typical values for dropout voltage at V
OUT
< 2 V are measured at V
OUT
= 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that V
IN
does not not drop below 2.0 V.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.
V
OUT
is defined as the output voltage of the DUT at 1 mA.
g. The Error Output (Low) function is guaranteed from V
OUT
= 2.0 V to V
OUT
= 5.0 V.
h. The Power_Good trip threshold function is guaranteed from V
OUT
= 1.5 V to V
OUT
= 5.0 V and V
IN
w
2.0 V.
Document Number: 71119
S-40694—Rev. D, 19-Apr-04
www.vishay.com
3
Si9181
Vishay Siliconix
TIMING WAVEFORMS
V
IN
t
ON
V
NOM
0.95 V
NOM
V
OUT
ERROR
t
DELAY
FIGURE 4.
Timing Diagram for Power-Up
PIN CONFIGURATION
TSSOP-8
C
NOISE
DELAY
GND
V
IN
1
2
3
4
Top View
8
7
6
5
SD
ERROR
SENSE or ADJ
V
OUT
PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
www.vishay.com
Name
C
NOISE
DELAY
GND
V
IN
V
OUT
SENSE or ADJ
ERROR
SD
Function
Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected from this pin
to ground.
Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7) output.
Refer to Figure 4.
Ground pin. Local ground for C
NOISE
and C
OUT
.
Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground.
Output voltage. Connect C
OUT
between this pin and ground.
For fixed output voltage versions, this pin should be connected to V
OUT
(Pin 5). For adjustable output voltage version,
this voltage feedback pin sets the output voltage via an external resistor divider.
This open drain output is an error flag output which goes low when V
OUT
drops 5% below its nominal voltage. This pin
also provides a power-on-reset signal if a capacitor is connected to the DELAY pin.
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to V
IN
if unused.
Document Number: 71119
S-40694—Rev. D, 19-Apr-04
4
Si9181
Vishay Siliconix
ORDERING INFORMATION
Part Number
Si9181DQ-15-T1
Si9181DQ-18-T1
Si9181DQ-20-T1
Si9181DQ-25-T1
Si9181DQ-28-T1
Si9181DQ-285-T1
Si9181DQ-29-T1
Si9181DQ-30-T1
Si9181DQ-33-T1
Si9181DQ-50-T1
Si9181DQ-AD-T1
Lead (Pb)-Free
Part Number
Si9181DQ-15-T1—E3
Si9181DQ-18-T1—E3
Si9181DQ-20-T1—E3
Si9181DQ-25-T1—E3
Si9181DQ-28-T1—E3
Si9181DQ-285-T1—E3
Si9181DQ-29-T1—E3
Si9181DQ-30-T1—E3
Si9181DQ-33-T1—E3
Si9181DQ-50-T1—E3
Si9181DQ-AD-T1—E3
Marking
115
118
120
125
128
285
129
130
133
150
1AD
Voltage
1.5 V
1.8 V
2.0 V
2.5 V
2.8 V
2.85 V
2.9 V
3.0 V
3.3 V
5.0 V
Adjustable
Temperature Range
Package
−40
to 85_C
TSSOP-8
* Additional voltage options are available.
Eval Kit
Si9181DB
Temperature Range
−40
to 85_C
Board Type
Surface Mount
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Dropout Voltage vs. Load Current
300
250
200
V
OUT
(V)
150
100
50
0
0
100
200
300
I
LOAD
(mA)
400
500
600
V
OUT
= 3.3 V
3.5
3.0
R
LOAD
= 16.5
W
2.5
2.0
1.5
1.0
0.5
0.0
0
1
2
3
V
IN
(V)
4
5
6
Dropout Characteristic
V
DROP
(mV)
Dropout Voltage vs. Temperature
200
175
150
V
DROP
(mV)
125
100
75
50
25
0
−50
50
I
OUT
= 10 mA
I
OUT
= 0 mA
−25
0
25
50
75
100
125
150
Junction Temperature (_C)
Document Number: 71119
S-40694—Rev. D, 19-Apr-04
V
OUT
= 3.3 V
I
OUT
= 350 mA
I
OUT
= 300 mA
Dropout Voltage (mV)
250
200
300
Dropout Voltage vs. V
OUT
I
OUT
= 350 mA
150
100
I
OUT
= 300 mA
I
OUT
= 10 mA
0
1.0
1.5
2.0
2.5
3.0
V
OUT
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3.5
4.0
4.5
5.0
5
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