Si9113DB
Vishay Siliconix
Si9113 Demonstration Board
FEATURES
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ISDN-NT Input Voltage Range 28 V to 99 V
Non-Polar Input
3.3-V/120-mA, 40-V/12-mA Outputs With Up To 80% Efficiency
Up to 68% Efficiency at 80-mW Load
40 V Isolated By 3 kV From Input And 3.3-V Output – Si9113D1
3.3 V, 40 V Isolated By 1.5 kV From Input/Each Other – Si9113D2
Current Mode Control, 0.6-V Fast Over-Current Protection
Max 50% Duty Cycle Operation
1.3-MHz Error Amp
Soft-Start
<10-mA Supply Current for +V
IN
<18 V
Programmed Start/Stop
Internal Start-Up Circuit
Power_Good Output
DESCRIPTION
As discussed in application note, AN728, the Si9113 power
supply controller is an ideal choice for ISDN terminal
equipment, where high efficiency at a low power level is one of
most important criteria. Therefore, Vishay Siliconix has
developed versions of a dual output flyback application
demonstration boards, the Si9113D1 and the Si9113D2, which
use different regulation schemes. These readily available
demo boards are configured to deliver approximately 800 mW
at 3.3-V, and40-V. These outputs and can be easily modified
for other output voltages at approximately same power level.
The flyback converters are designed to operate from a wide
input voltage range of 28 V to 99 V and are polarity protected
by a diode bridge. The Si9113D1 and Si9113D2, both operate
at 20-kHz switching frequency to achieve the best possible
efficiency. The transformer is selected to be slightly larger in
this application so that the same area product would be good
enough for an even lower window utilization factor (w.u.f.)
transformer in order to meet the stringent requirements of
clearance and creepage distances.
The Si9113D1 senses and tightly regulates the main output
V
OUT1
(3.3 V), which has the common ground as input and the
secondary output V
OUT2
(40 V) is regulated to within
$10%
at
10% to100% load range, including the set point accuracy.
Correspondingly. the transformer must be specified with tight
tolerance to achieve the given set point accuracy. The 40-V
output is isolated from both the input and 3.3-V output by
minimum 3 kV
rms
isolation.
The Si9113D2 uses the auxiliary output (V
CC
bootstrap
winding) for sensing. Both V
OUT1
(3.3 V) and V
OUT2
(40 V)
follow the auxiliary output, residing on one core and sharing the
same flux. Both the outputs are isolated from the input as well
as from each other by 1.5 kV and moderately regulated to
$5%.
Each demonstration board uses all surface mount
components except the high voltage electrolyte capacitor and
are fully assembled and tested for quick evaluation. Test points
are provided for the power_good signal and the closed loop
response measurement.
Included in this document are the Bill-Of-Materials,
Schematics, PCB Layout of the Demo Boards and actual
waveforms/graphs.
The demonstration board layout is available in Gerber file format. Please contact your Vishay Siliconix sales representative or
distributor for a copy.
ORDERING INFORMATION:
Si9113D1—
V
OUT1
(3.3 V) Tightly regulated, non-isolated
V
OUT2
(40 V) Loosely regulated, 3 kV isolated
Si9113D2—
V
OUT1
(3.3 V) Moderately regulated, 1.5 kV isolated
V
OUT2
(40 V) Moderately regulated, 1.5 kV isolated
Document Number: 71117
29-Feb-00
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Si9113DB
Vishay Siliconix
POWER UP CHECK LIST AND OPERATION
The Si9113D1 and Si9113D2 are designed to operate in
discontinuous mode at nominal line and load conditions. Both
demo boards use the same operational procedure, as follows:
1
2
3
Visually inspect the PCB to be sure that all the components
are intact and no foreign substance is lying on the board.
Solder the leads at C1 negative and MOSFET Q1 drain to
monitor the drain waveform on the oscilloscope.
Reduce the source voltage to zero and connect it through
the dc ammeter at V
IN
+ and V
IN
–. Connect the dc
voltmeter precisely across V
IN
+ and V
IN
–. For the
application where input is of fixed polarity, the diode bridge
BR1 can be eliminated by shorting pin 1 to 4 and pin 2 to
3 to achieve even higher efficiency.
6
4
Connect the voltmeter precisely across V
OUT1
– Com1 and
V
OUT2
– Com2 for the output voltage measurement.
Connect the oscilloscope ground to C1 negative while the
probe to Q1 drain to observe the switching waveforms.
Slowly increase the input voltage while monitoring the input
current meter. Note the input current is less than 10
mA
at
18 V
IN
and continue to increase the voltage further till the
circuit turns on at approximately 24 V.
Set the input voltage to 48 V nominal and monitor the drain
waveform, switching frequency, input and output ripple and
noise.
The efficiency, line, load and cross regulation can be
measured by varing the line between 28 to 99 V, and the
load between 10% and 100%.
5
7
ACTUAL WAVEFORMS AND PERFORMANCE
Drain Voltage and Current
to reduce the leakage inductance. Refer to Figure 1 for the
drain voltage and current waveforms. The current starting from
zero indicates the discontinuous mode operation and absence
of any leakage spike at drain shows the tight coupling between
the windings.
The circuit is designed to operate in discontinuous mode at
nominal line and full load. The transformer is cleverly designed
44.00
43.00
42.00
41.00
V
OUT2
(V)
40.00
3.3 V @ 120 mA
39.00
38.00
37.00
36.00
0
V
IN
= 28 V
Outputs – Full lLoad
Ch1 – Primary Current (0.1A/div)
Ch3 – Drain Voltage (20 V/div)
3.00
6.00
9.00
12.00
15.00
I
OUT2
(mA)
3.3 V @ 12 mA
FIGURE 1.
Drain Voltage and Current Waveform – Si9113D2
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FIGURE 2.
V
OUT2
(40 V) Load/cross Regulation – Si9113D1
Document Number: 71117
29-Feb-00
2
Si9113DB
Vishay Siliconix
Output Regulation
The output regulation of slave outputs depend upon the
loading condition of main output.
In Si9113D1, the V
OUT1
(3.3 V) is tightly regulated to within 1%,
while V
OUT2
(40 V) follows the main output. Figure 2 depicts
the typical load regulation of 40 V output, when the main output
is at 10% and at full load condition.
In Si9113D2, the V
OUT1
and V
OUT2
are both moderately
regulated. Figures 3 and 4 show the 3.3-V and 40-V regulation
with the outputs loaded at 10% to100% of the rated load. The
3.460
3.420
3.380
40 V @ 12 mA
3.340
V
OUT1
(V)
3.300
3.260
3.220
3.180
3.140
0
25
50
75
I
OUT1
(mA)
100
125
150
Vout2 (V)
40 V @ 1.2 mA
40.50
40.00
39.50
39.00
38.50
38.00
0
3.00
6.00
9.00
12.00
15.00
3.3 V @ 12 mA
3.3 V @ 120 mA
output voltages are essentially constant with respect to any
variation of input voltage in case of both demo boards.
Output Ripple and Noise
The tantalum chip capacitors are used for lower ESR and
higher ripple current capability. Low cost aluminium capacitors
can also be used where form fator and/or output ripple are of
secondary importance. Also, a small additional LC filter can be
added at 3.3-V output for further attenuation of ac component
by even five to ten times. The Si9113D1 – Figure 5 and
Si9113D2 – Figure 6 show the ripple at a full load and 48-V
input.
42.00
41.50
41.00
I
OUT2
(mA)
FIGURE 3.
V
OUT1
(3.3 V) Load/cross Regulation – Si9113D2
FIGURE 4.
V
OUT2
(40 V) Load/Cross Regulation – Si9113D2
V
IN
= 48 V
Outputs = At Full Load
Ch1 = 3.3 V (20 mV/div))
Ch3 = 40 V (100 mV/div)
V
IN
= 48 V
Outputs = At Full Load
Ch1 = 3.3 V (20 mV/div))
Ch3 = 40 V (100 mV/div)
FIGURE 5.
Output Ripple and Noise – Si9113D1
Document Number: 71117
29-Feb-00
FIGURE 6.
Output Ripple and Noise – Si9113D2
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Si9113DB
Vishay Siliconix
EFFICIENCY
90.00
80.00
70.00
Efficiency %
Efficiency %
60.00
50.00
40.00
30.00
20.00
10.00
0.00
0
200
400
600
800
1000
V
IN
= 99 V
V
IN
= 28 V
V
IN
= 48 V
90.00
80.00
70.00
60.00
50.00
40.00
30.00
20.00
10.00
0.00
0
200
400
600
800
1000
V
IN
= 99 V
V
IN
= 28 V
V
IN
= 48 V
W
O
(mW)
W
O
(mW)
FIGURE 7.
Converter Output Load vs Efficiency – Si9113D1
FIGURE 8.
Converter Output Load vs Efficiency – Si9113D2
COMPENSATION
The closed loop response is observed at 48 V
IN
and full load
at both outputs on the venable by applying the error across R8
and measuring the gain, phase change encountered by the
signal at both ends of R8. Refer to Figures 9 and 10 for the
actual response.
60
50
40
30
20
Gain (dB)
10
0
–10
–20
–30
–40
–50
–60
10
100
1,000
Frequency (Hz)
10,000
Gain
Phase
180
150
120
90
60
Gain (dB)
30
Phase
0
–30
–60
–90
–120
–150
–180
50,000
80
60
40
Gain
20
0
–20
–40
–60
–80
10
Phase
120
90
60
30
Phase
0
–30
–60
–90
–120
10000
100
1000
Frequency (Hz)
FIGURE 9.
Measured Close Loop Response – Si9113D1
FIGURE 10.
Measured Closed Loop Response–Si9113D2
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Document Number: 71117
29-Feb-00
Si9113DB
Vishay Siliconix
Dynamic Load Response
The step load is applied at 1A/mS slew rate at one output, while keeping the other output at rated load. Refer to Figures 11 through 14.
V
IN
= 48 V
V
OUT1
= Step –12 to 120 mA
Ch1 = V
OUT1
(3.3 V)
Ch4 = Load (50 mA/div)
Slew Rate = 1A/msec
V
IN
= 48 V
V
OUT2
= Step Load 1.2 to 12 mA
V
OUT1
= At Full Load
Ch1 = V
OUT2
(40 V)
Ch4 = Load (10 mA/div)
Slew Rate = 1A/msec
FIGURE 11.
V
OUT1
(3.3 V) Transient Load Response – Si9113D1
FIGURE 12.
V
OUT2
(40 V) Transient Load Response – Si9113D1
V
IN
= 48 V
V
OUT1
= Step Load 12 mA – 120 mA
V
OUT2
= At Full Load
Ch1 = V
OUT1
(3.3 V)
Ch4 = 100 mA/div
Slew Rate = 1A/msec
V
IN
= 48 V
V
OUT2
= Step Load 1.2 mA – 12 mA
V
OUT1
= At Full Load
Ch1 = V
OUT2
(40 V)
Ch4 = 10 mA/div
Slew Rate = 1A/msec
FIGURE 13.
V
OUT1
(3.3 V) Transient Load Response—Si9113D2
FIGURE 14.
V
OUT2
(40 V) Transient Load Response—Si9113D2
Document Number: 71117
29-Feb-00
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