Si9104
Vishay Siliconix
High-Voltage Switchmode Regulator
FEATURES
• 10- to 120-V Input Range
• Current-Mode Control
• On-Chip 200-V, 5-Ω MOSFET Switch
• SHUTDOWN and RESET
• High Efficiency Operation (>80%)
• Internal Start-Up Circuit
• Internal Oscillator (1 MHz)
DESCRIPTION
The Si9104 high-voltage switchmode regulator is a monolithic
BiC/DMOS integrated circuit which contains most of the
components necessary to implement a high-efficiency dc-to-
dc converter up to 3 watts. It can either be operated from a
low-voltage dc supply, or directly from a 10- to 120-V
unregulated dc power source.
This device may be used with an appropriate transformer to
implement most single-ended isolated power converter
topologies (i.e., flyback and forward).
The Si9104 is available in a 16-pin wide-body SOIC and is
specified over the D suffix (-40 to 85°C) temperature range.
FUNCTIONAL BLOCK DIAGRAM
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Si9104
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to -V
IN
(V
CC
< +V
IN
+ 0.3 V)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 V
V
DS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V
I
D
(Peak) (300
µs
pulse, 2% duty cycle). . . . . . . . . . . . . . . . . . . . . 2 A
I
D
(rms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250 mA
Logic Inputs (RESET, SHUTDOWN, OSC IN) . . -0.3 V to V
CC
+ 0.3 V
Linear Inputs (FEEDBACK, SOURCE) . . . . . . . . . . . . . . -0.3 V to 7 V
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . .3 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 125°C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85°C
Junction Temperature (T
J
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Power Dissipation (Package)
a
16-Pin Plastic Wide-Body SOIC
b
. . . . . . . . . . . . . . . . . . . . . 900 mW
Thermal Impedance (Θ
JA
)
16-Pin Plastic Wide-Body SOIC . . . . . . . . . . . . . . . . . . . . . . 140°C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.2 mW/°C above 25°C.
RECOMMENDED OPERATING RANGE
Voltages Referenced to -V
IN
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 13.5 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 120 V
f
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 kHz to 1 MHz
R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 kΩ to 1 MΩ
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 7 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
SPECIFICATIONS
a
Test Conditions Unless
Otherwise Specified
Parameter
Reference
Output Voltage
Output Impedance
e
Short Circuit Current
Temperature Stability
e
Long Term Stability
e
V
R
Z
OUT
I
SREF
T
REF
V
REF
= -V
IN
t = 1000 hrs., T
A
= 125°C
OSC IN = - V
IN
(OSC Disabled)
R
L
= 10 MΩ
Room
Full
Room
Room
Full
Room
3.92
3.85
15
70
4.0
30
100
0.25
5
4.08
4.15
45
130
1.0
25
V
kΩ
µA
mV/°C
mV
Limits
D Suffix -40 to 85°C
Symbol
DISCHARGE = -V
IN
= 0 V, V
CC
= 10 V
+V
IN
= 48 V, R
BIAS
= 390 kΩ
R
OSC
= 330 kΩ
Temp
b
Min
d
Typ
c
Max
d
Unit
Oscillator
Maximum Frequency
e
Initial Accuracy
Voltage Stability
Temperature Coefficient
e
f
MAX
f
OSC
∆f/f
T
OSC
R
OSC
= 0
R
OSC
= 330 kΩ
f
R
OSC
= 150 kΩ
f
∆f/f
= f(13.5 V) - f(10 V) / f(10 V)
Room
Room
Room
Room
Full
1
80
160
4
3
100
200
10
200
120
240
15
500
MHz
kHz
%
ppm/
°C
Error Amplifier
Feedback Input Voltage
Input BIAS Current
Input OFFSET Voltage
Open Loop Voltage Gain
Unity Gain Bandwidth
e
e
V
FB
I
FB
V
OS
A
VOL
BW
Z
OUT
I
OUT
PSRR
FB Tied to COMP
OSC IN = - V
IN
(OSC Disabled)
OSC IN = - V
IN
, V
FB
= 4 V
Room
Room
Room
3.96
4.00
25
±15
4.04
500
±40
V
nA
mV
dB
MHz
Ω
mA
dB
OSC IN = - V
IN
(OSC Disabled)
Room
Room
Room
60
0.7
80
1
1000
-2.0
2000
-1.4
Dynamic Output Impedance
e
Output Current
Power Supply Rejection
Source (V
FB
= 3.4 V)
Sink (V
FB
= 4.5 V)
10 V
≤
V
CC
≤
13.5 V
Room
Room
Room
0.12
50
0.15
70
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SPECIFICATIONS
a
Test Conditions Unless
Otherwise Specified
Parameter
Current Limit
Threshold Voltage
Delay to Output
V
SOURCE
t
d
R
L
= 100
Ω
from DRAIN to V
CC,
V
FB
= 0 V
R
L
= 100
Ω
from DRAIN to V
CC
V
SOURCE
= 1.5 V, See Figure 1.
I
IN
= 10
µA
V
CC
≥
10 V
Pulse Width
≤
300
µs,
V
CC
= 7 V
I
PRE-REGULATOR
= 10
µA
R
L
= 100
Ω
from DRAIN to V
CC
See Detailed Description
Room
Room
1.0
1.2
100
1.4
200
V
ns
Limits
D Suffix -40 to 85°C
Symbol
DISCHARGE = -V
IN
= 0 V, V
CC
= 10 V
+V
IN
= 48 V, R
BIAS
= 390 kΩ
R
OSC
= 330 kΩ
Temp
b
Min
d
Typ
c
Max
d
Unit
Pre-Regulator/Start-Up
Input Voltage
Input Leakage Current
Pre-Regulator Start-Up
Current
V
CC
Pre-Regulator Turn-Off
Threshold Voltage
Undervoltage Lockout
V
REG
- V
UVLO
+V
IN
+I
IN
I
START
V
REG
V
UVLO
V
DELTA
Room
Room
Room
Room
Room
Room
8
7.8
7.0
0.3
15
9.4
8.8
0.6
9.8
9.3
V
120
10
V
µA
mA
Supply
Supply Current
Bias Current
I
CC
I
BIAS
Room
Room
0.45
10
0.6
15
1.0
20
mA
µA
Logic
SHUTDOWN Delay
e
SHUTDOWN Pulse Width
RESET Pulse Width
e
e
t
SD
t
SW
t
RW
V
SOURCE
= -V
IN
, See Figure 2.
Room
Room
Room
50
50
25
50
100
Latching Pulse
SHUTDOWN and RESET
Low
Input Low Voltage
Input High Voltage
Input Current
Input Voltage High
Input Current
Input Voltage Low
Width
e
See Figure 3.
t
LW
V
IL
V
IH
I
IH
I
IL
V
IN
= V
CC
V
IN
= 0 V
Room
Room
Room
Room
Room
-35
8.0
1
-25
5
ns
2.0
V
µA
MOSFET Switch
Breakdown Voltage
Drain-Source On-Resistance
g
Drain Off Leakage Current
Drain Capacitance
e
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25°C, Cold and Hot = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. C
STRAY
@ OSC IN
≤
5 pF.
g. Temperature coefficient of r
DS(on)
is 0.75% per °C, typical.
V
BR(DSS)
r
DS(on)
I
DSS
C
DS
I
DRAIN
= 100
µA
I
DRAIN
= 100 mA
V
DRAIN
= 150 V
Full
Room
Room
Room
200
220
3
5
35
5
10
V
Ω
µA
pF
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Si9104
Vishay Siliconix
TIMING WAVEFORMS
FIGURE 1.
FIGURE 2.
FIGURE 3.
TYPICAL CHARACTERISTICS
FIGURE 4.
FIGURE 5.
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Si9104
Vishay Siliconix
PIN CONFIGURATIONS
PIN DESCRIPTION
Pin Number
Function
SOURCE
-V
IN
V
CC
OSC
OUT
OSC
IN
DISCHARGE
V
REF
SHUTDOWN
RESET
COMP
FB
BIAS
+V
IN
DRAIN
NC
14-Pin Plastic DIP
4
5
6
7
8
9
10
11
12
13
14
1
2
3
16-Pin SOIC
1
2
4
5
6
7
8
9
10
11
12
13
14
16
3, 15
20-Pin PLCC
7
8
9
10
11
12
14
16
17
18
20
2
3
5
1, 4, 6, 13, 15, 19
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