Si860x
B
IDIRECTIONAL
I
2
C I
SOLA TORS
D
IGITA L
C
HANNELS
Features
WITH
U
NIDIRECTIONAL
Independent, bidirectional SDA and
SCL isolation channels
Open drain outputs with 35 mA
sink current
Supports
High electromagnetic immunity
Wide operating supply voltage
3.0
clocks up to 1.7 MHz
Unidirectional isolation channels
support additional system signals
(Si8605, Si8606)
Up to 5000 V
RMS
isolation
I
2
C
UL, CSA, VDE recognition
60-year life at rated working voltage
to 5.5 V
Wide temperature range
–40 to +125 °C
Transient immunity 50 kV/µs
AEC-Q100 qualification
RoHS-compliant packages
SOIC-8 narrow body
SOIC-16 wide body
SOIC-16 narrow body
Applications
Isolated I
2
C, PMBus, SMBus
Power over Ethernet
Motor Control Systems
Hot-swap applications
Intelligent Power systems
Isolated SMPS systems with PMBus
interfaces
Description
The Si860x series of isolators are single-package galvanic isolation solutions for I
2
C
and SMBus serial port applications. These products are based on Silicon Labs
proprietary RF isolation technology and offer shorter propagation delays, lower
power consumption, smaller installed size, and more stable operation with
temperature and age versus opto couplers or other digital isolators.
All devices in this family include hot-swap, bidirectional SDA and/or SCL isolation
channels with open-drain, 35 mA sink capability that operate to a maximum
frequency of 1.7 MHz. The 8-pin version (Si8600) supports bidirectional SDA and
SCL isolation; the Si8602 supports bidirectional SDA and unidirectional SCL
isolation, and the 16-pin versions (Si8605, Si8606) feature two unidirectional
isolation channels to support additional system signals, such as interrupts or resets.
All versions contain protection circuits to guard against data errors when an
unpowered device is inserted into a powered system.
Small size, low installed cost, low power consumption, and short propagation delays
make the Si860x family the optimum solution for isolating I
2
C and SMBus serial
ports.
Ordering Information:
See page 26.
Safety Regulatory Approval
UL 1577 recognized
Up to 5000 V
RMS
for 1 minute
CSA component notice 5A approval
IEC 60950-1, 61010-1, 60601-1
(reinforced
insulation)
VDE certification conformity
IEC 60747-5-2
(VDE0884 Part 2)
EN60950-1 (reinforced insulation)
Rev. 1.2 6/12
Copyright © 2012 by Silicon Laboratories
Si860x
Si860x
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1. Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1. Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3. Typical Application Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1. I
2
C Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2. I
2
C Isolator Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3. I
2
C Isolator Design Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.4. I
2
C Isolator Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.5. Typical Application Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4. Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1. Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.2. Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.3. Input and Output Characteristics for Non-I2C Digital Channels . . . . . . . . . . . . . . . . 20
4.4. Layout Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.5. Fail-Safe Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.6. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7. Package Outline: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8. Land Pattern: 16-Pin Wide-Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
9. Package Outline: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
10. Land Pattern: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
11. Package Outline: 16-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
12. Land Pattern: 16-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
13. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
13.1. Si860x Top Marking (16-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
13.2. Top Marking Explanation (16-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . 35
13.3. Si860x Top Marking (8-Pin Narrow Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
13.4. Top Marking Explanation (8-Pin Narrow Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . 36
13.5. Si860x Top Marking (16-Pin Narrow Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . 37
13.6. Top Marking Explanation (16-Pin Narrow Body SOIC) . . . . . . . . . . . . . . . . . . . . . . 37
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Rev. 1.2
3
Si860x
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
Ambient Operating Temperature*
Supply Voltage
Symbol
T
A
AVDD
BVDD
Test Condition
Min
–40
3.0
3.0
Typ
25
—
—
Max
125*
5.5
5.5
Unit
°C
V
V
*Note:
The maximum ambient temperature is dependent on data frequency, output loading, number of operating channels,
and supply voltage.
Table 2. Si860x Power Characteristics*
3.0 V < VDD < 5.5 V. TA = –40 to +125 °C. Typical specs at 25 °C (See Figures 2 and 9 for test diagrams.)
Parameter
Si8600 Supply Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
Si8602 Supply Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
Si8605 Supply Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
Symbol
Test Condition
Min
Typ
Max
Unit
Idda
Iddb
Idda
Iddb
Idda
Iddb
All channels = 0 dc
All channels = 1 dc
All channels = 1.7 MHz
—
—
—
—
—
—
5.4
4.3
2.6
1.9
3.3
2.6
7.6
6.5
3.9
2.9
5.0
3.9
mA
mA
mA
mA
mA
mA
Idda
Iddb
Idda
Iddb
Idda
Iddb
All channels = 0 dc
All channels = 1 dc
All channels = 1.7 MHz
—
—
—
—
—
—
1.8
1.8
4.7
3.1
2.5
2.1
2.7
2.7
7.1
4.7
3.8
3.2
mA
mA
mA
mA
mA
mA
Idda
Iddb
Idda
Iddb
Idda
Iddb
All non-I
2
C channels = 0
All I
2
C channels = 1
All non-I
2
C channels = 1
All I
2
C channels = 0
All non-I
2
C channels = 5 MHz
All I
2
C channels = 1.7 MHz
—
—
—
—
—
—
3.4
2.7
7.2
6.2
4.2
3.6
5.1
4.1
10.1
8.7
6.3
5.4
mA
mA
mA
mA
mA
mA
*Note:
All voltages are relative to respective ground.
4
Rev. 1.2
Si860x
Table 2. Si860x Power Characteristics* (Continued)
3.0 V < VDD < 5.5 V. TA = –40 to +125 °C. Typical specs at 25 °C (See Figures 2 and 9 for test diagrams.)
Parameter
Si8606 Supply Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
AVDD Current
BVDD Current
Symbol
Test Condition
Min
Typ
Max
Unit
Idda
Iddb
Idda
Iddb
Idda
Iddb
All non-I
2
C channels = 0
All I
2
C channels = 1
All non-I
2
C channels = 1
All I
2
C channels = 0
All non-I
2
C channels = 5 MHz
All I
2
C channels = 1.7 MHz
—
—
—
—
—
—
2.8
3.0
8.3
5.5
4.1
3.5
4.2
4.5
11.6
7.7
6.2
5.3
mA
mA
mA
mA
mA
mA
*Note:
All voltages are relative to respective ground.
Table 3. Si8600/02/05/06 Electrical Characteristics for Bidirectional I
2
C Channels
1
3.0 V < VDD < 5.5 V. TA = –40 to +125 °C. Typical specs at 25 °C unless otherwise noted.
Parameter
Logic Levels Side A
Logic Input Threshold
2
Logic Low Output Voltages
Input/Output Logic Low Level
Difference
3
Logic Levels Side B
Logic Low Input Voltage
Logic High Input Voltage
Logic Low Output Voltage
SCL and SDA Logic High
Leakage
Pin Capacitance SDAA, SCLA,
SDAB, SDBB
Symbol
I
2
CV
T
(Side A)
I
2
CV
OL
(Side A)
I
2
CV (Side A)
Test Condition
Min
410
540
50
Typ
—
—
—
Max
540
800
—
Unit
mV
mV
mV
mV
ISDAA, ISCLA
(>0.5 mA, <3.0 mA)
I
2
CV
IL
(Side B)
I
2
CV
IH
(Side B)
I
2
CV
OL
(Side B)
Isdaa, Isdab
Iscla, Isclb
CA
CB
ISCLB = 35 mA
SDAA, SCLA = VSSA
SDAB, SCLB = VSSB
—
2.0
—
—
—
—
—
—
—
2.0
10
10
0.8
—
500
10
—
—
V
V
mV
µA
pF
pF
Notes:
1.
All voltages are relative to respective ground.
2.
V
IL
< 0.410 V, V
IH
> 0.540 V.
3.
I
2
CV (Side A) = I
2
CV
OL
(Side A) – I
2
CV
T
(Side A). To ensure no latch-up on a given bus, I
2
CV (Side A) is the
minimum difference between the output logic low level of the driving device and the input logic threshold.
4.
Side A measured at 0.6 V.
Rev. 1.2
5
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