Continuous Source Current (MOSFET Diode Conduction)
a
Average Foward Current (Schottky)
Pulsed Foward Current (Schottky)
Maximum Power Dissipation (MOSFET)
a
Maximum Power Dissipation
(Schottky)
a
T
A
= 25_C
T
A
= 85_C
T
A
= 25_C
T
A
= 85_C
T
J
, T
stg
P
D
T
A
= 25_C
T
A
= 85_C
Symbol
V
DS
V
KA
V
GS
I
D
I
DM
I
S
I
F
I
FM
5 sec
--20
20
8
--3.6
--2.6
--10
--1.8
1.0
7
2.1
1.1
1.3
0.68
Steady State
Unit
V
8
--2.7
--1.9
--0.9
A
1.1
0.6
0.96
0.59
--55 to 150
260
_C
W
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
b, c
Notes
a. Surface Mounted on 1” x1” FR4 Board.
b. See Reliability Manual for profile. The ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation
process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder intercon-
nection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 71239
S-21251—Rev. B, 05-Aug-02
www.vishay.com
2-1
Si5853DC
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
t
≤
5 sec
Junction-to-Ambient
a
J
ti t A bi t
Steady State
St d St t
Device
MOSFET
Schottky
MOSFET
Schottky
MOSFET
Schottky
Symbol
Typical
50
77
Maximum
60
95
110
130
40
40
Unit
R
thJA
90
110
_C/W
Junction-to-Foot
Junction to Foot
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
Steady State
R
thJF
30
33
MOSFET SPECIFICATIONS (T
J
= 25_C UNLESS OTHERWISE NOTED)
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
V
GS(th)
I
GSS
I
DSS
I
D(on)
V
DS
= V
GS
, I
D
= --250
mA
V
DS
= 0 V, V
GS
=
8
V
V
DS
= --16 V, V
GS
= 0 V
V
DS
= --16 V, V
GS
= 0 V, T
J
= 85_C
V
DS
≤
--5 V, V
GS
= --4.5 V
V
GS
= --4.5 V, I
D
= --2.7 A
Drain-Source On-State Resistance
a
r
DS(on)
V
GS
= --2.5 V, I
D
= --2.2 A
V
GS
= --1.8 V, I
D
= --1 A
Forward Transconductance
a
Diode Forward Voltage
a
g
fs
V
SD
V
DS
= --10 V, I
D
= --2.7 A
I
S
= --0.9 A, V
GS
= 0 V
--10
0.095
0.137
0.205
7
--0.8
--1.2
0.110
0.160
0.240
S
V
Ω
--0.45
100
--1
--5
V
nA
mA
A
Symbol
Test Condition
Min
Typ
Max
Unit
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
t
rr
I
F
= --0.9 A, di/dt = 100 A/ms
V
DD
= --10 V, R
L
= 10
Ω
I
D
≅
--1 A, V
GEN
= --4.5 V, R
G
= 6
Ω
V
DS
= --10 V, V
GS
= --4.5 V, I
D
= --2.7 A
,
,
4.4
1.4
0.65
16
30
30
27
20
25
45
45
40
40
ns
6.5
nC
Notes
a. Pulse test; pulse width
≤
300
ms,
duty cycle
≤
2%.
b. Guaranteed by design, not subject to production testing.
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