3.3/5/12 Vin Single Output
DC-DC CONVERTERS
•
•
•
•
•
•
•
•
•
•
•
Non-isolated DDR/QDR Memory Bus Termination Module
NEW Product
1
V
TT
bus termination output (output the system V
REF
)
10 A output current
3.3 Vdc, 5 Vdc or 12 Vdc input voltage
DDR and QDR compatible
ON/OFF inhibit (for V
TT
standby)
Under-voltage lockout
Operating temperature range: -40 ºC to +85 ºC
Efficiencies up to 91%
Output overcurrent protection (non-latching, auto-reset)
Point-of-Load-Alliance (POLA) compatible
Available RoHS compliant
PTHxx060Y
The PTHxx060Y are a new series of non-isolated dc-dc converters designed specifically
for bus termination in DDR and QDR memory applications. Operating from either a
3.3 Vdc, 5 Vdc or 12 Vdc input, the modules generate a VTT output that will source or
sink up to 10 A of current to accurately track their VREF input. VTT is the required bus
termination supply voltage, and VREF is the reference voltage for the memory and chipset
bus receiver comparators. VREF is usually set to half the VDDQ power supply voltage.
The PTHxx060Y series employs an actively switched synchronous rectifier output to
provide state of the art stepdown switching conversion. The products are small in size
and are an ideal choice where space, performance and high efficiency are desired.
All specifications are typical at nominal input, V
REF
= 1.25 V, full load at 25 °C
unless otherwise stated. C
in
, C
o1
and C
o2
= typical value
OUTPUT SPECIFICATIONS
Output current
(See Note 1)
Tracking range for V
REF
Tracking tolerance to V
REF
(V
TT
- V
REF
)
(over line, load
and temperature)
Ripple and noise
Load transient response
(See Note 4)
Output capacitance:
Non-ceramic values
(See Notes 4 and 5)
Ceramic values
(See Note 4)
(See Note 6)
INPUT SPECIFICATIONS
Input current
Input voltage range
No load
PTH03060Y
PTH05060Y
PTH12060Y
10 mA
2.95-3.65 Vdc
4.5-5.5 Vdc
10.8-13.2 Vdc
ENVIRONMENTAL SPECIFICATIONS
Thermal performance
(See Note 2)
MSL (‘Z’ suffix only)
PROTECTION
Overcurrent threshold
(auto reset)
All models
Operating ambient,
temperature
Non-operating
20 MHz bandwidth
(over ∆V
REF
range)
±10 A
0.55-1.8 V
-10 mV to +10 mV
INPUT SPECIFICATIONS CONTD.
Input capacitance
(See Note 3)
Remote ON/OFF
GENERAL SPECIFICATIONS
Efficiency
(Io = 8 A)
20 mV pk-pk
Insulation voltage
Switching frequency
PTH03060Y
PTH05060Y
PTH12060Y
PTH03060Y
PTH05060Y
PTH12060Y
2 YEAR WARRANTY
SPECIFICATIONS
PTH03060Y and PTH05060Y
PTH12060Y
330 µF
560 µF
Positive logic
86% typ.
86% typ.
83% typ.
Non-isolated
550-650 kHz
550-650 kHz
200-300 kHz
EN60950
UL/cUL60950
UL94V-0
30 µs settling time
Overshoot/undershoot 25 mV typ.
PTH03060Y 470 µF typ., 5,500
PTH05060Y 470 µF typ., 5,500
PTH12060Y 940 µF typ., 5,500
PTH03060Y 200 µF typ., 300
PTH05060Y 200 µF typ., 300
PTH12060Y 400 µF typ., 600
ESR (non-ceramic)
µF max.
µF max.
µF max.
µF max.
µF max.
µF max.
4 mΩ min
Approvals and
standards
Material flammability
Dimensions
Weight
MTBF
Telcordia SR-332
(L x W x H)
25.27 x 15.75 x 9.00 mm
0.995 x 0.620 x 0.354 in
3.7 g (0.13 oz)
6,000,000 hours
-40 ºC to +85 ºC
-40 ºC to +125 ºC
Level 3
Undervoltage lockout:
PTH03060Y
PTH05060Y
PTH12060Y
Vin increasing 2.45 V typ., 2.80 V max.
Vin decreasing 2.20 V min., 2.40 V typ.
Vin
Vin
Vin
Vin
increasing 4.30 V typ., 4.45 V max.
decreasing 3.40 V min., 3.70 V typ.
increasing
9.5 V typ., 10.4 V max.
decreasing
8.80 V min., 9.0 V typ.
JEDEC J-STD-020C
20 A typ.
File Name: pthxx060y.pdf Rev (02): 19 Dec 2005
3.3/5/12 Vin Single Output
DC-DC CONVERTERS
Non-isolated DDR/QDR Memory Bus Termination Module
NEW Product
2
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
OUTPUT
POWER
(MAX.)
18 W
18 W
18 W
OUTPUT
CURRENT
(MIN.)
0A
0A
0A
OUTPUT
CURRENT
(MAX.)
±10 A
±10 A
±10 A
PTHxx060Y
VTT
RANGE
0.55-1.8 Vdc
0.55-1.8 Vdc
0.55-1.8 Vdc
INPUT
VOLTAGE
2.95-3.65 Vdc
4.50-5.50 Vdc
10.8-13.2 Vdc
EFFICIENCY
(TYP.)
86%
86%
83%
MODEL
NUMBER
(8,9)
PTH03060Y
PTH05060Y
PTH12060Y
Part Number System with Options
PTH05060YAST
Packaging Options
No Suffix = Trays
T = Tape and Reel
(7)
Mounting Option
(8)
D = Horizontal Through-Hole (Matte Sn)
H = Horizontal Through-Hole (Sn/Pb)
S = Surface-Mount (63/37 Sn/Pb
pin solder material)
Z = Surface-Mount (96.5/3.0/0.5 Sn/Ag/Cu
pin solder material)
Pin Option
A = Through-Hole Std. Pin Length (0.140”)
A = Surface-Mount Tin/Lead Solder Ball
Output Voltage Code
Y = DDR Module
Product Family
Point of Load Alliance
Compatible
Input Voltage
03 = 3.3 V, 05 = 5 V
and 12 = 12 V
Output Current
06 = 10 A
Mechanical Package
Always 0
Notes
1
Rating is conditional on the module being soldered to a 4 layer PCB with
1 oz. copper. See the SOA curves or contact the factory for appropriate
derating.
This control pin has an internal pull-up to the input voltage Vin. If it is left
open-circuit the module will operate when input power is applied. A small
low-leakage (<100 nA) MOSFET is recommended for control. For further
information, consult Application Note 179.
An input capacitor is required for proper operation. The capacitor must
be rated for a minimum of 500 mA rms (1000 mA for 12 V input) of ripple
current. For further information, consult Application Note 179 on
capacitor selection.
The typical value of external output capacitance value ensures that VTT
meets the specified transient performance requirements for the memory
bus terminations. Lower values of capacitance may be possible when the
measured peak change in output current is consistently less than 3 A.
Test conditions were 15 A/µs load step, -1.5 A to +1.5 A.
5
6
This is the calculated maximum. The minimum ESR limitation will often
result in a lower value. Consult Application Note 179 for further details.
This is the typcial ESR for all the electrolytic (non-ceramic) output
capacitance. Use 7 m
Ω
as the minimum when using max-ESR values to
calculate.
Tape and reel packaging only available on the surface-mount versions.
To order Pb-free (RoHS compatible) surface-mount parts replace the
mounting option ‘S’ with ‘Z’, e.g. PTHxx060YAZ. To order Pb-free (RoHS
compatible) through-hole parts replace the mounting option ‘H’ with ‘D’,
e.g. PTHxx060YAD.
NOTICE: Some models do not support all options. Please contact your
local Artesyn representative or use the on-line model number search tool at
http://www.artesyn.com/powergroup/products.htm to find a suitable
alternative.
2
7
8
3
9
4
International Safety Standard Approvals
UL/cUL CAN/CSA-C22.2 No. 60950
File No. E174104
TÜV Product Service (EN60950) Certificate No. B 04 06 38572 044
CB Report and Certificate to IEC60950, Certificate No. US/8292/UL
File Name: pthxx060y.pdf Rev (02): 19 Dec 2005
3.3/5/12 Vin Single Output
DC-DC CONVERTERS
Non-isolated DDR/QDR Memory Bus Termination Module
NEW Product
3
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
PTHxx060Y
12
14
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
10
8
6
4
2
0
0
10
20
30
40
50
60
70
80
Nat conv
100 LFM
200 LFM
10
8
6
4
2
0
0
10
20
30
40
50
60
70
80
Nat conv
100 LFM
200 LFM
AMBIENT TEMPERATURE (ºC)
Figure 1 - Safe Operating Area
Vin = 5.0 V, V
REF
= 1.25 V, Iout = 10 A (See Note A)
AMBIENT TEMPERATURE (ºC)
Figure 2 - Safe Operating Area
Vin = 12 V, V
REF
= 1.25 V, Iout = 10 A (See Note A)
Vin
100
90
EFFICIENCY (%)
V
DDQ
1k
1%
1k
1%
10 9
1
8
7
V
REF
V
tt
PTHxx060Y
(Top View)
2
3 4
5
6
80
70
60
50
0
2
4
6
8
10
Vin
3.3V
5.0V
12.0V
Co
n
hf-Ceramic
C
in
(Required)
+
Co
1
Low-ESR
(Required)
V
tt
Termination Island
+
Co
2
Ceramic
(Optional)
Standby
GND
Q
1
BSS138
(Optional)
SSTL-2
Data/
Address/
Bus
OUTPUT CURRENT (A)
Figure 3 - Efficiency vs Load Current
V
REF
= 1.25 V (See Note B)
Figure 4 - Standard Application
Notes
A
The SOA curves represent the conditions at which internal components
are within the Artesyn derating guidelines.
B
Characteristic data has been developed from actual products tested at
25 °C. This data is considered typical data for the converter.
File Name: pthxx060y.pdf Rev (02): 19 Dec 2005
3.3/5/12 Vin Single Output
DC-DC CONVERTERS
Non-isolated DDR/QDR Memory Bus Termination Module
NEW Product
4
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
PTHxx060Y
0.995 (25.27)
0.125 (3.18)
0.125 (3.18)
0.060
(1.52)
1
0.375
(9.52)
10
9
8
0.250
(6.35)
7
0.140
(3.55)
0.060
(1.52)
ø
0.040 (1.02)
5 Places.
0.620
0.500 (15.75)
(12.70)
0.070 (1.78)
(Standoff Shoulder)
2
3
4
TOP VIEW
5
6
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
PIN CONNECTIONS
PIN NO.
FUNCTION
Ground
Vin
Inhibit*
N/C
Vo sense
V
TT
Ground
V
REF
N/C
N/C
Host Board
0.354 (9.00)
MAX.
SIDE VIEW
1
2
3
4
5
6
7
8
9
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places
±0.030
(±0.76)
3 Places
±0.010
(±0.25)
Figure 5 - Plated Through-Hole Mechanical Drawing
0.995 (25.27)
0.125 (3.18)
0.125 (3.18)
0.375
(9.52)
1
10
9
8
*After solder reflow
on customer board
10
0.060
(1.52)
0.354 (9.00)
max.*
0.060
(1.52)
0.250
(6.35)
7
*Denotes negative logic:
Open = Normal operation
Ground = Function active
0.500 0.620
(12.70) (15.75)
Solder Ball
ø
0.040 (1.02)
10 Places
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
2
3
4
5
6
SIDE VIEW
Host Board
TOP VIEW
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
Figure 6 - Surface-Mount Mechanical Drawing
Datasheet © Artesyn Technologies® 2005
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent
accompany the sale of any such product(s) or information contained herein.
Please consult our website for the following items:
Application Note
www.artesyn.com
File Name:
聊聊、笑笑、闹闹
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
