UTC MJE13007
NPN EPITAXIAL SILICON TRANSISTOR
NPN BIPOLAR POWER TRANSISTOR
FOR SWITCHING POWER SUPPLY
APPLICATIONS
DESCRIPTION
The UTC MJE13007 is designed for high–voltage,
high–speed power switching inductive circuits where fall
time is critical. It is particularly suited for 115 and 220 V
switchmode applications.
FEATURES
* V
CEO(sus)
400 V
* 700 V Blocking Capability
1
TO-220F
APPLICATIONS
*Switching Regulators
*Inverters
*Motor Controls
*Solenoid/Relay drivers
*Deflection circuits
1: BASE
2: COLLECTOR
3: EMITTER
*Pb-free plating product number:MJE13007L
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Collector-Emitter Sustaining Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Voltage
Collector Current – Continuous
– Peak (1)
Base Current – Continuous
– Peak (1)
Emitter Current – Continuous
– Peak (1)
Total Device Dissipation @ T
C
= 25℃
Operating and Storage Temperature
SYMBOL
V
CEO
V
CES
V
EBO
Ic
I
CM
I
B
I
BM
I
E
I
EM
P
D
T
J
, T
stg
RATINGS
400
700
9.0
8.0
16
4.0
8.0
12
24
80
-65 ~ +150
UNIT
V
V
V
A
A
A
W
℃
THERMAL CHARACTERISTICS RATINGS
PARAMETER
Thermal Resistance
SYMBOL
RATINGS
UNIT
℃/W
R
θJC
1.56
Junction to Case
R
θJA
62.5
Junction to Ambient
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle≤10%.
*Measurement made with thermocouple contacting the bottom insulated mounting surface of the package (in a
location beneath the die), the device mounted on a heatsink with thermal grease applied at a mounting torque of 6
to 8•lbs.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
1
QW-R219-004,A
UTC MJE13007
PARAMETER
Collector-Emitter Sustaining Voltage
Collector Cutoff Current
Emitter Cutoff Current
DC Current Gain
Collector-Emitter Saturation Voltage
NPN EPITAXIAL SILICON TRANSISTOR
SYMBOL
V
CEO(sus)
I
CES
I
EBO
h
FE1
h
FE2
V
CE(sat)
ELECTRICAL CHARACTERISTICS
(Tc=25℃, unless otherwise noted)
TEST CONDITIONS
Ic=10mA, I
B
=0
V
CES
=700V
V
CES
=700V, T
C
=125℃
V
EB
=9.0V, I
C
=0
I
C
=2.0A, V
CE
=5.0V
I
C
=5.0A, V
CE
=5.0V
I
C
=2.0A, I
B
=0.4A
I
C
=5.0A, I
B
=1.0A
I
C
=8.0A, I
B
=2.0A
I
C
=5.0A, I
B
=1.0A, T
C
=100℃
I
C
=2.0A, I
B
=0.4A
I
C
=5.0A, I
B
=1.0A
I
C
=5.0A, I
B
=1.0A, T
C
=100℃
4.0
14
80
0.025
0.5
1.8
0.23
0.1
1.5
3.0
0.7
MIN
400
TYP MAX UNIT
V
0.1
1.0
100
40
30
1.0
2.0
3.0
3.0
1.2
1.6
1.5
mA
μA
8.0
5.0
V
Base-Emitter Saturation Voltage
V
BE(sat)
V
MHz
pF
Current-Gain-Bandwidth Product
f
T
I
C
=500mA, V
CE
=10V, f=1.0 MHz
Output Capacitance
C
ob
V
CB
=10V, I
E
=0, f=0.1MHz
Resistive Load (Table 1)
V
CC
=125V, I
C
=5.0A,
Delay Time
t
d
I
B1
=I
B2
=1.0A, t
p
=25μs,
Rise Time
t
r
Duty Cycle≦1.0%
Storage Time
t
s
Fall Time
t
f
* Pulse Test: Pulse Width≤300μs, Duty Cycle≤2.0%
μs
CLASSIFICATION OF HFE1
RANK
RANGE
A
8 ~ 16
B
15 ~ 21
C
20 ~ 26
D
25 ~ 31
E
30 ~ 36
F
35 ~ 40
TYPICAL THERMAL RESPONSE
Figure1. Typical Thermal Response
TRANSIENT THERMAL RESISTANCE,
r(t) (NORMALIZED)
1
0.7
0.5
0.2
0.1
0.07
0.05
0.02
D=0.1
D=0.05
D=0.02
P(pk)
t1
t2
D=0.01
R
θJC
(t)=r(t)R
θJC
R
θJC
=1.56℃/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
-Tc=P
(pk)
R
θJC
(t)
D=0.5
D=0.2
0.01
0.01
SINGLE PULSE
0.05
0.1
0.2
0.5
1
DUTY CYCLE, D=t
1
/t
2
5
2
TIME, t (msec)
10
20
50
100
200
500
10k
0.02
There are two limitations on the power handling ability of a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
-V
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 7 is based on T
C
= 25℃; T
J(pk)
is variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be debated when T
C
≥25℃.
Second breakdown limitations do not
UTC
UNISONIC TECHNOLOGIES CO., LTD.
2
QW-R219-004,A
UTC MJE13007
NPN EPITAXIAL SILICON TRANSISTOR
debate the same as thermal limitations. Allowable current at the voltages shown on Figure 7 may be found at any
case temperature by using the appropriate curve on Figure 9.
At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
Use of reverse biased safe operating area data (Figure 8) is discussed in the applications information section.
TABLE 1. TEST CONDITIONS FOR DYNAMIC PERFORMANCE
REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING
Vcc
+15V
1μF
150Ω
3W
RESISTIVE
SWITCHING
TEST CIRCUITS
100Ω
3W
MTP8P10
MTP8P10
MUR105
RB1
A
100μF
L
+125
MUR8100E
Rc
+10V
MPF930
MPF930
IB
IB
Ic
Vclamp=300V
R
B
TUT
SCOPE
MJE210
500Ω
COMMON
500μF
Voff
150Ω
3W
RB2
5.1k
VCE
D1
TUT
MTP12N10
1μF
51
-4V
CIRCUIT VALUES
V
(BR)CEO (SUS)
L=10mH
R
B2
=8
Vcc=20V
Ic(pk)=100mA
Inductive
Switching
RBSOA
L=500mH
L=20mH
R
B2
=0
R
B2
=0
Vcc=15V
Vcc=15Volts
R
B1
selected
R
B1
selected
for desired I
B1
for desired I
B1
TYPICAL
WAVEFORMS
Vcc=125V
Rc=25Ω
D1=1N5820 OR EQUIV
I
C
I
CM
t
f
CLAMPED
t
f
UNCLAMPED≒t
2
t
1
ADJUSTED TO
OBTAIN Ic
t
1
≒
L
coil
(I
CM
)
Vcc
L
coil
(I
CM
)
Vclamp
V
CE
PEAK
V
CE
I
B1
I
B
I
B2
+11V
0
25μs
t
1
V
CE
V
CEM
tf
t
t
2
≒
Vclamp
t
TEST EQUIPMENT
SCOPE-TEKTRONIX
475 OR EQUIVALENT
9V
tr, tf<10ns
DUTY CYCLE=1.0%
R
B
AND R
C
ADJUSTED
FOR DESIRED I
B
AND I
C
TIME
t
2
UTC
UNISONIC TECHNOLOGIES CO., LTD.
3
QW-R219-004,A
UTC MJE13007
TYPICAL CHARACTERISTICS
BASE-EMITTE SATURATION VOLTAGE,
VBE(sat) (VOLTS)
NPN EPITAXIAL SILICON TRANSISTOR
Figure 3. Collector-Emitter Saturation Voltage
COLLECTOR-EMITTE SATURATION
VOLTAGE, VCE(sat) (VOLTS)
10
5
2
1
0.5
0.2
0.1
0.05
0.02
I
C
=-40℃
25℃
100℃
0.05 0.1 0.2
0.5
1
2
5
10
I
C
/I
B
=5
Figure 2. Base-Emitter Saturation Voltage
1.4
1.2
1
I
C
=-40℃
0.8
0.6
25℃
100℃
I
C
/I
B
=5
0.4
0.01 0.02
0.05
0.1 0.2
0.5
1
2
5
10
0.01
0.01 0.02
COLLECTOR CURRENT, Ic (AMPS)
COLLECTOR CURRENT, Ic (AMPS)
Figure 4. Collector Saturation Region
3
COLLECTOR-EMITTER VOLTAGE,
VCE (VOLTS)
2.5
2
1.5
1
0.5
0
0.01 0.02
Ic=1A
Ic=5A
Ic=3A
Ic=8A
T
J
=25℃
DC CURRENT GAIN, hFE
100
T
J
=100℃
25℃
10
40℃
Figure 5. DC Current Gain
V
CE
=5
0.05 0.1
0.2
0.5
1
2 3
5
10
1
0.01
0.1
1
10
BASE CURRENT, I
B
(AMPS)
COLLECTOR CURRENT, Ic (AMPS)
Figure 6. Capacitance
T
J
=25℃
Cib
1000
COLLECTOR CURRENT, I
C
(AMPS)
10000
CAPACITANCE, C (pF)
100
50
20
10
5
2
1
0.5
0.2
0.1
0.05
Figure 7. Maximum Forward Bias Safe Operating Area
Extended SOA@1μs,10μs
1μs
10μs
Tc=25℃
DC
5ms
1ms
Cob
100
10
0.1
1
10
100
1000
0.02
0.01
10
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
CURVES APPLY BELOW
RATED V
CEO
20
30
50 70 100
200 300
500
1000
REVERSE VOLTAGE,V
R
(VOLTS)
COLLECTOR-EMITTER VOLTAGE, V
CE
(VOLTS)
UTC
UNISONIC TECHNOLOGIES CO., LTD.
4
QW-R219-004,A
UTC MJE13007
NPN EPITAXIAL SILICON TRANSISTOR
Figure 9. Forward Bias Power Derating
1
POWER DERATING FACTOR
0.8
0.6
0.4
0.2
THERMAL
DERATING
SECOND BREAKDOWN
DERATING
Figure 8. Maximum Reverse Bias Switching Safe
Operating Area
COLLECTOR CURRENT, I
C
(AMPS)
10
8
6
4
2
0
0V
0
100
200
300
400
500
600
Tc≦100℃
G
AIN
≧4
Lc=500μH
V
BE
(off)
-5V
-2V
700
800
0
20
40
60
80
100
120
140
160
COLLECTOR-EMITTER CLAMP VOLTAGE,
V
CEV
(VOLTS)
Figure 10. Turn-On Time(Resistive Load)
10000
Vcc=125V
Ic/I
B
=5
I
B
(on)=I
B
(off)
T
j
=25℃
PW=125 µs
10000
7000
5000
t
r
TIME, t (ns)
2000
1000
700
500
CASE TEMPERATURE, T
C
(℃)
Figure 11. Turn-Off Time(Resistive Load)
t
s
Vcc=125V
Ic/I
B
=5
I
B(on)
=I
B(off)
T
J
=25℃
t
r
PW=25μs
TIME, t (ns)
1000
100
t
d
10
1
2
3
4
5
6
7 8 9 10
t
f
200
100
1
2
3
4
5
6
7 8 9 10
COLLECTOR CURRENT, I
C
(AMP)
COLLECTOR CURRENT, I
C
(AMP)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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