NGATE to PGND Voltage ...........................–0.3V to P
VCC
V
FB
, I
TH
/RUN to PGND Voltages ................ –0.3V to 3.5V
PACKAGE/ORDER I FOR ATIO
TOP VIEW
I
TH
/RUN
PGND
NGATE
P
VCC
R
CLASS
NC
V
PORTN
NC
1
2
3
4
5
6
7
8
17
16 V
FB
15 PGND
14 SENSE
13 V
PORTP
12 SIGDISA
11 PWRGD
10 P
OUT
9
NC
ORDER PART
NUMBER
LTC4267CDHC
LTC4267IDHC
DFN PART*
MARKING
4267
4267
DHC16 PACKAGE
16-LEAD (3mm
×
5mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43.5°C/W
EXPOSED PAD (PIN 17) MUST BE SOLDERED
TO ELECTRICALLY ISOLATED PCB HEAT SINK
Order Options
Tape and Reel: Add #TR Lead Free: Add #PBF
Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades are identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
PORTN
PARAMETER
Supply Voltage
Maximum Operating Voltage
Signature Range
Classification Range
UVLO Turn-On Voltage
UVLO Turn-Off Voltage
P
VCC
Turn-On Voltage
P
VCC
Turn-Off Voltage
P
VCC
Hysteresis
P
VCC
Shunt Regulator Voltage
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
Voltage with Respect to V
PORTP
Pin
(Notes 4, 5, 6)
●
●
●
●
●
●
●
●
●
V
TURNON
V
TURNOFF
V
HYST
V
CLAMP1mA
Voltage with Respect to PGND
Voltage with Respect to PGND
V
TURNON
– V
TURNOFF
I
PVCC
= 1mA, V
ITH
/RUN = 0V, Voltage
with Respect to PGND
2
U
U
W
W W
U
W
TOP VIEW
PGND 1
I
TH
/RUN 2
NGATE 3
P
VCC
4
R
CLASS
5
NC 6
V
PORTN
7
PGND 8
16 PGND
15 V
FB
14 SENSE
13 V
PORTP
12 SIGDISA
11 PWRGD
10 P
OUT
9
PGND
ORDER PART
NUMBER
LTC4267CGN
LTC4267IGN
GN PART
MARKING
4267
4267I
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
T
JMAX
= 150°C,
θ
JA
= 90°C/W
MIN
TYP
MAX
–57
–9.5
–21
–37.2
–31.5
9.2
6.8
10.3
UNITS
V
V
V
V
V
V
V
V
V
4267fc
–1.5
–12.5
–34.8
–29.3
7.8
4.6
1.5
8.3
–36.0
–30.5
8.7
5.7
3.0
9.4
LTC4267
The
●
denotes
ELECTRICAL CHARACTERISTICS
25°C. (Note 3) the specifications which apply over the full operating
temperature range, otherwise specifications are at T =
A
SYMBOL
V
MARGIN
I
VPORTN_ON
I
PVCC_ON
PARAMETER
V
CLAMP1mA
– V
TURNON
Margin
V
PORTN
Supply Current when ON
P
VCC
Supply Current
Normal Operation
Start-Up
CONDITIONS
●
MIN
0.05
●
●
●
●
●
●
●
TYP
0.6
MAX
3
UNITS
V
mA
µA
µA
mA
%
kΩ
kΩ
I
VPORTN_CLASS
V
PORTN
Supply Current
During Classification
∆I
CLASS
Current Accuracy
During Classification
R
SIGNATURE
Signature Resistance
R
INVALID
Invalid Signature Resistance
⎯ ⎯
V
PORTN
= –48V, P
OUT
, PW
⎯
R
⎯
G
⎯
D, SIGDISA Floating
(Note 7)
V
ITH
/RUN – PGND = 1.3V
P
VCC
– PGND = V
TURNON
– 100mV
V
PORTN
= –17.5V, P
OUT
Tied to V
PORTP
, R
CLASS
,
SIGDISA Floating (Note 8)
10mA < I
CLASS
< 40mA, –12.5V ≤ V
PORTN
≤ –21V
(Notes 9, 10)
–1.5V ≤ V
PORTN
≤ – 9.5V, P
OUT
Tied to V
PORTP
,
IEEE 802.3af 2-Point Measurement (Notes 4, 5)
–1.5V ≤ V
PORTN
≤ – 9.5V, SIGDISA and P
OUT
Tied to
V
PORTP
, IEEE 802.3af 2-Point Measurement
(Notes 4, 5)
With Respect to V
PORTN
High Level Invalidates Signature (Note 11)
With Respect to V
PORTN
Low Level Enables Signature
With Respect to V
PORTN
I = 1mA V
PORTN
= –48V,
⎯
P
⎯
W
⎯
R
⎯
G
⎯
D Referenced to V
PORTN
V
PORTN
= –48V, Voltage between V
PORTN
and P
OUT
(Note 10)
P
OUT
Falling
P
OUT
Rising
V
PORTN
= 0V,
⎯
P
⎯
W
⎯
R
⎯
G
⎯
D FET Off, V
⎯
P
⎯
W
⎯
R
⎯
G
⎯
D
= 57V
I = 300mA, V
PORTN
= –48V, Measured from
V
PORTN
to P
OUT
(Note 10)
P
VCC
– PGND = V
TURNON
+ 100mV
V
ITH
/RUN – PGND = 0V, P
VCC
– P
GND
= 8V
Referenced to PGND, P
VCC
– P
GND
= 8V (Note 12)
P
VCC
– P
GND
= 8V (Note 12)
I
TH
/RUN Pin Load = ±5µA (Note 12)
V
TURNOFF
< P
VCC
< V
CLAMP
(Note 12)
I
TH
/RUN Sinking 5µA, P
VCC
– P
GND
= 8V (Note 12)
I
TH
/RUN Sourcing 5µA, P
VCC
– P
GND
= 8V (Note 12)
V
PORTN
= 0V, Power MOSFET Off,
P
OUT
= 57V (Note 13)
V
PORTN
= –48V, P
OUT
= –43V (Note 14, 15)
0°C ≤ T
A
≤ 70°C
–40°C ≤ T
A
≤ 85°C
V
PORTN
= –48V, P
OUT
= –43V (Note 14, 15)
V
ITH
/RUN – PGND = 1.3V, P
VCC
– P
GND
= 8V
V
ITH
/RUN – PGND = 1.3V, V
FB
– PGND = 0.8V,
P
VCC
– P
GND
= 8V
V
ITH
/RUN – PGND = 1.3V, V
FB
– PGND = 0.8V,
P
VCC
– P
GND
= 8V
0.35
240
40
0.5
350
90
0.65
±3.5
23.25
9
26.00
11.8
V
IH
V
IL
R
INPUT
V
PG_OUT
Signature Disable
High Level Input Voltage
Signature Disable
Low Level Input Voltage
Signature Disable, Input Resistance
Power Good Output Low Voltage
Power Good Trip Point
●
●
●
●
3
57
0.45
V
V
kΩ
V
100
0.5
V
PG _FALL
V
PG_RISE
I
PG_LEAK
R
ON
V
ITHSHDN
I
THSTART
V
FB
I
FB
g
m
∆V
O(LINE)
∆V
O(LOAD)
I
POUT_LEAK
I
LIM_HI
Power Good Leakage Current
On-Resistance
Shutdown Threshold (at I
TH
/RUN)
Start-Up Current Source at I
TH
/RUN
Regulated Feedback Voltage
V
FB
Input Current
Error Amplifier Transconductance
Output Voltage Line Regulation
Output Voltage Load Regulation
P
OUT
Leakage
Input Current Limit, High Level
●
●
●
1.3
2.7
1.5
3.0
1.0
●
●
●
0.15
0.2
0.780
200
0.28
0.3
0.800
10
333
0.05
3
3
1.7
3.3
1
1.6
2
0.45
0.4
0.812
50
500
V
V
µA
Ω
Ω
V
µA
V
nA
µA/V
mV/V
mV/µA
mV/µA
µA
●
150
●
●
●
I
LIM_LO
f
OSC
DC
ON(MIN)
DC
ON(MAX)
Input Current Limit, Low Level
Oscillator Frequency
Minimum Switch On Duty Cycle
Maximum Switch On Duty Cycle
325
300
80
180
375
375
140
200
6
80
400
400
180
240
8
90
mA
mA
mA
kHz
%
%
70
4267fc
3
LTC4267
ELECTRICAL CHARACTERISTICS
SYMBOL
t
RISE
t
FALL
V
IMAX
I
SLMAX
t
SFST
T
SHUTDOWN
PARAMETER
NGATE Drive Rise Time
NGATE Drive Fall Time
Peak Current Sense Voltage
Peak Slope Compensation Output Current
Soft-Start Time
Thermal Shutdown Trip Temperature
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
C
LOAD
= 3000pF, P
VCC
– P
GND
= 8V
C
LOAD
= 3000pF, P
VCC
– P
GND
= 8V
R
SL
= 0, P
VCC
– P
GND
= 8V (Note 16)
P
VCC
– P
GND
= 8V (Note 17)
P
VCC
– P
GND
= 8V
(Notes 14, 18)
MIN
TYP
40
40
100
5
1.4
140
MAX
UNITS
ns
ns
mV
µA
ms
°C
●
90
115
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
P
VCC
internal clamp circuit self regulates to 9.4V with respect to
PGND.
Note 3:
The LTC4267 operates with a negative supply voltage in the range
of – 1.5V to – 57V. To avoid confusion, voltages for the PD interface
are always referred to in terms of absolute magnitude. Terms such as
“maximum negative voltage” refer to the largest negative voltage and
a “rising negative voltage” refers to a voltage that is becoming more
negative.
Note 4:
The LTC4267 is designed to work with two polarity protection
diode drops between the PSE and PD. Parameter ranges specified in the
Electrical Characteristics section are with respect to this product pins and
are designed to meet IEEE 802.3af specifications when these diode drops
are included. See the Application Information section.
Note 5:
Signature resistance is measured via the two-point
ΔV/ΔI
method
as defined by IEEE 802.3af. The PD signature resistance is offset from the
25kΩ to account for diode resistance. With two series diodes, the total PD
resistance will be between 23.75kΩ and 26.25kΩ and meet IEEE 802.3af
specifications. The minimum probe voltages measured at the LTC4267
pins are –1.5V and –2.5V. The maximum probe voltages are –8.5V and
–9.5V.
Note 6:
The PD interface includes hysteresis in the UVLO voltages to
preclude any start-up oscillation. Per IEEE 802.3af requirements, the PD
will power up from a voltage source with 20Ω series resistance on the first
trial.
Note 7:
Dynamic Supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 8:
I
VPORTN_CLASS
does not include classification current
programmed at the R
CLASS
pin. Total current in classification mode will be
I
VPORTN_CLASS
+ I
CLASS
(See note 9).
Note 9:
I
CLASS
is the measured current flowing through R
CLASS
.
ΔI
CLASS
accuracy is with respect to the ideal current defined as I
CLASS
= 1.237/
R
CLASS
. The current accuracy does not include variations in R
CLASS
resistance. The total classification current for a PD also includes the IC
quiescent current (I
VPORTN_CLASS
). See Applications Information.
Note 10:
For the DHC package, this parameter is assured by design and
wafer level testing.
Note 11:
To disable the 25kΩ signature, tie SIGDISA to V
PORTP
or hold
SIGDISA high with respect to V
PORTN
. See Applications Information.
Note 12:
The switching regulator is tested in a feedback loop that servos
V
FB
to the output of the error amplifier while maintaining I
TH
/RUN at the
midpoint of the current limit range.
Note 13:
I
POUT_LEAK
includes current drawn through P
OUT
by the power
good status circuit. This current is compensated for in the 25kΩ signature
resistance and does not affect PD operation.
Note 14:
The LTC4267 PD Interface includes thermal protection. In the
event of an overtemperature condition, the PD interface will turn off
the switching regulator until the part cools below the overtemperature
limit. The LTC4267 is also protected against thermal damage from
incorrect classification probing by the PSE. If the LTC4267 exceeds the
overtemperature threshold, the classification load current is disabled.
Note 15:
The PD interface includes dual level input current limit. At turn-
on, before the P
OUT
load capacitor is charged, the PD current level is set
to a low level. After the load capacitor is charged and the P
OUT
– V
PORTN
voltage difference is below the power good threshold, the PD switches to
high level current limit. The PD stays in high level current limit until the
input voltage drops below the UVLO turn-off threshold.
Note 16:
Peak current sense voltage is reduced dependent on duty cycle
and an optional external resistor in series with the SENSE pin (R
SL
). For
details, refer to the programmable slope compensation feature in the
Applications Information section.
Note 17:
Guaranteed by design.
Note 18:
The PD interface includes overtemperature protection that is
intended to protect the device from momentary overload conditions.
Junction temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
国际半导体设备材料产业协会（SEMI）昨（10）日公布半导体设备资本支出的年中预测报告（SEMI Capital Equipment Forecast），预估2012年全球半导体设备营收规模将达到423.8亿美元，2013年将成长至467.1亿美元。
受惠平板电脑、智慧型手机与行动装置等消费性电子商品亮丽表现，半导体设备的采购需求仍将持续。SEMI在报告中指出，2011年半...[详细]
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