Pull-Up Current ....................................................5mA
PWRGD, T2PSE
Voltage........................... –0.3V to 100V
PWRGD, T2PSE
Pull-Down Current .......................10mA
Junction Temperature ........................................... 125°C
Operating Ambient Temperature Range
LTC4265C ................................................ 0°C to 70°C
LTC4265I.............................................. –40°C to 85°C
DE PACKAGE
12-LEAD (4mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 13) TO BE TIED TO V
IN
AND SOLDERED TO PCB HEAT SINK
orDer inForMaTion
LEAD FREE FINISH
LTC4265CDE#PBF
LTC4265IDE#PBF
TAPE AND REEL
LTC4265CDE#TRPBF
LTC4265IDE#TRPBF
PART MARKING*
4265
4265
PACKAGE DESCRIPTION
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
elecTrical characTerisTics
PARAMETER
Operating Input Voltage
Signature Range
Classification Range
Turn-On Voltage
Undervoltage Lock Out
Overvoltage Lock Out
ON/UVLO Hysteresis Window
Signature/Class Hysteresis Window
Reset Threshold
CONDITIONS
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2)
MIN
l
l
l
l
l
l
TYP
MAX
60
9.8
21
37.2
UNITS
V
V
V
V
V
V
V
V
At GND Pin (Note 5)
1.5
12.5
30.0
4.1
1.4
2.57
71
State Machine Reset for 2-event Classification
l
5.40
V
2
4265fb
For more information
www.linear.com/LTC4265
LTC4265
elecTrical characTerisTics
PARAMETER
SUPPLY CURRENT
Supply Current at 60V
Class 0 Current
SIGNATURE
Signature Resistance
Invalid Signature Resistance, SHDN Invoked
CLASSIFICATION
Class Accuracy
Classification Stability Time
NORMAL OPERATION
Inrush Current
Power FET On Resistance
Power FET Leakage Current at V
OUT
DIGITAL INTERFACE
SHDN Input High Level Voltage
SHDN Input Low Level Voltage
SHDN Input Resistance
PWRGD, T2PSE
Voltage Output Low
PWRGD, T2PSE
Leakage Current
PWRGD Voltage Output Low
PWRGD Voltage Clamp
PWRGD Leakage Current
GND = 9.8V, SHDN = 9.65V
Tested at 1mA, GND = 54V. For
T2PSE,
Must Complete
2-event Classification to See Active Low.
Pin Voltage Pulled 57V, GND = V
IN
= 0
Tested at 0.5mA, GND = 52V, V
OUT
= 48V, Output Voltage
is with Respect to V
OUT
Tested at 2mA, V
OUT
= 0V, Voltage with Respect to V
OUT
V
PWRGD
= 11V, V
OUT
= V
IN
= 0V, GND = 54V
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2)
CONDITIONS
Measured at GND Pin
GND = 17.5V, No R
CLASS
Resistor
1.5V ≤ GND ≤ 9.8V (Note 6)
1.5V ≤ GND ≤ 9.8V, V
SHDN
= 3V (Note 6)
l
l
MIN
TYP
MAX
1.35
0.40
UNITS
mA
mA
kΩ
kΩ
kΩ
%
ms
l
l
l
23.25
26
11
11
±3.5
1
Invalid Signature Resistance During Mark Event (Notes 6, 7)
10mA < I
CLASS
< 40mA, 12.5V < GND < 21V (Note 8, 9)
GND Pin Step to 17.5V, R
CLASS
= 30.9, I
CLASS
Within
3.5% of Ideal Value (Notes 8, 9)
GND = 54, V
OUT
= 3V
Tested at 600mA into V
OUT
, GND = 54V
GND = SHDN = V
OUT
= 57V
l
l
l
l
l
60
100
0.70
180
1.0
1
mA
Ω
µA
V
3
0.45
100
0.15
1
0.4
12
16.5
1
V
kΩ
V
µA
V
V
µA
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to any Absolute Maximum
Rating condition for extended periods may affect device reliability and lifetime.
Note 2:
All voltages are with respect to V
IN
pin unless otherwise noted.
Note 3:
Pins with 100V absolute maximum guaranteed for T ≥ 0ºC, otherwise 90V.
Note 4:
PWRGD voltage clamps at 14V with respect to V
OUT
.
Note 5:
Input voltage specifications are defined with respect to LTC4265
pins and meet IEEE 802.3af/at specifications when the input diode bridge
is included.
Note 6:
Signature resistance is measured via the
ΔV/ΔI
method with a
minimum
ΔV
of 1V. The LTC4265 signature resistance accounts for the
additional series resistance in the input diode bridge.
Note 7:
An invalid signature after the 1st classification event is mandated
by IEEE 802.3at standard. See Applications Information.
Note 8:
Class accuracy is with respect to the ideal current defined as
1.237/R
CLASS
and does not include variations in R
CLASS
resistance.
Note 9:
This parameter is assured by design and wafer level testing.
Note 10:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
4265fb
For more information
www.linear.com/LTC4265
3
LTC4265
Typical perForMance characTerisTics
Input Current vs Input Voltage
25k Detection Range
0.5
T
A
= 25°C
50
Input Current vs Input Voltage
T
A
= 25°C
CLASS 4
INPUT CURRENT (mA)
10.5
11.0
Input Current vs Input Voltage
CLASS 1 OPERATION
0.4
INPUT CURRENT (mA)
INPUT CURRENT (mA)
40
0.3
30
CLASS 3
CLASS 2
CLASS 1
CLASS 0
0
10
20
30
40
GND VOLTAGE (V)
(RISING)
50
60
85°C
–40°C
10.0
0.2
20
0.1
0
10
0
0
2
4
6
GND VOLTAGE (V)
8
10
4265 G01
9.5
12
14
18
16
GND VOLTAGE (V)
20
22
4265 G03
4265 G02
Signature Resistance
vs Input Voltage
28
RESISTANCE =
∆V
= V2 – V1
∆I
I
2
– I
1
27 DIODES: HD01
T
A
= 25°C
IEEE UPPER LIMIT
LTC4265 + 2 DIODES
INPUT
VOLTAGE
10V/DIV
Class Operation vs Time
T
A
= 25°C
1.0
RESISTANCE (Ω)
TIME (10µs/DIV)
On Resistance vs Temperature
SIGNATURE RESISTANCE (k )
26
25
24
0.8
LTC4265 ONLY
23
IEEE LOWER LIMIT
CLASS
CURRENT
10mA/DIV
0.6
0.4
22
V1: 1
V2: 2
3
4
7
5
8
6
GND VOLTAGE (V)
9
10
4265 G04
4265 G05
0.2
–50
0
25
50
75
–25
JUNCTION TEMPERATURE (°C)
100
4265 G06
4
4265fb
For more information
www.linear.com/LTC4265
LTC4265
Typical perForMance characTerisTics
PWRGD, T2PSE
Output Low
Voltage vs Current
0.8
T
A
= 25°C
1.0
Active High PWRGD
Output Low Voltage vs Current
T
A
= 25°C
GND – V
OUT
= 4V
115
110
105
100
95
90
85
Inrush Current vs Input Voltage
0.6
V
PWRGD
(V)
V
T2PSE
(V)
PWRGD (V)
0.8
CURRENT (mA)
0
0.5
1
1.5
CURRENT (mA)
2
4265 G08
0.6
0.4
0.4
0.2
0.2
0
0
2
6
4
CURRENT (mA)
8
10
4265 G07
0
40
45
50
55
GND VOLTAGE (V)
60
4265 G09
pin FuncTions
SHDN (Pin 1):
Shutdown Input. Use this pin for auxiliary
power application. Drive SHDN high to disable LTC4265
operation and corrupt the signature resistance. If unused,
tie SHDN to V
IN
.
T2PSE
(Pin 2):
Type-2 PSE Indicator, Open-Drain. Low
impedance indicates the presence of a Type-2 PSE.
R
CLASS
(Pin 3):
Class Select Input. Connect a resistor
between R
CLASS
and V
IN
to set the classification load
current. (See Table 2.)
NC (Pin 4, 11):
No Connect.
V
IN
(Pins 5, 6):
Input Voltage, Negative Rail. Pins 5 and 6
must be electrically tied together at the package.
V
OUT
(Pins 7, 8):
Output Voltage Negative Rail. Connects
V
OUT
to V
IN
through an internal power MOSFET. Pins 7
and 8 must be electrically tied together at the package.
PWRGD (Pin 9):
Power Good Output, Open Collector.
High impedance signals power-up completion. PWRGD
is referenced to V
OUT
and features a 14V clamp.
PWRGD
(Pin 10):
Complementary Power Good Output,
Open-Drain. Low impedance signals power up completion.
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