using a current mode, constant-frequency architecture. It
provides a complete DDR solution with an input voltage
range from 2.25V to 5.5V.
The output of the first step-down regulator offers a high
accuracy V
DDQ
supply. A buffered reference generates
VTTR at 50% of VDDQIN and drives loads up to ±10mA.
The second regulator generates the DDR termination volt-
age (V
TT
) equal to VTTR. Both regulators are capable of
delivering ±3A of load current at 1MHz switching frequency.
The operating frequency is externally programmable up to
4MHz, allowing the use of small surface mount inductors.
0°, 90°, or 180° of phase shift between the two channels
can be selected to minimize input current ripple. For
switching noise-sensitive applications, the LTC3618 can
be synchronized to an external clock up to 4MHz.
The LTC3618 is offered in leadless 24-pin 4mm × 4mm
QFN and thermally enhanced 24-pin TSSOP packages.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6498466, 6580258, 6611131.
n
n
DDR Power Supply, Termination and Reference
High Efficiency: Up to 94%
Dual Outputs with ±3A Output Current Capability
2.25V to 5.5V Input Voltage Range
±1% Output Voltage Accuracy
V
TT
Output Voltage Down to 0.5V
Shutdown Current ≤1µA
VTTR = VDDQIN/2, V
FB2
= VTTR
Adjustable Switching Frequency Up to 4MHz
Internal or External Compensation
Selectable 0°/90°/180° Phase Shift Between Channels
Internal or External Soft-Start for V
DDQ
, Internal
Soft-Start for V
TT
Power Good Status Outputs
Low Profile 4mm × 4mm QFN-24 and TSSOP-24
Packages
applicaTions
n
n
n
DDR Memory
Supports DDR, DDR2, and DDR3 Standards
Tracking Supplies
Typical applicaTion
V
IN
3.3V
Efficiency and Power Loss vs Load Current
100µF
SV
IN
RUN1
TRACK/SS1
PGOOD1
ITH1
RT
392k
MODE/SYNC
PHASE
RUN2
PGOOD2
FB2
ITH2
VTTR
0.01µF
SGND
PGND
3618 TA01a
PV
IN1
PV
IN2
VDDQIN
1µH
SW1
422k
V
DDQ
1.8V/3A
47µF
100
90
80
EFFICIENCY (%)
70
60
50
40
30
20
10
0
0.01
0.1
1
LOAD CURRENT (A)
V
TT
= 0.9V
V
DDQ
= 1.8V
10
1
POWER LOSS (W)
LTC3618
FB1
210k
SW2
1µH
V
TT
0.9V/±3A
47µF
0.1
V
V
REF
=
DDQ
2
0.01
10
3618 TA01b
3618fc
For more information
www.linear.com/LTC3618
1
LTC3618
absoluTe MaxiMuM raTings
(Notes 1, 10)
PV
IN1
, PV
IN2
Voltages .................................. –0.3V to 6V
SV
IN
Voltage ................................................ –0.3V to 6V
SW1 Voltage .............................–0.3V to (PV
IN1
+ 0.3V)
SW2 Voltage ..............................–0.3V to (PV
IN2
+ 0.3V)
RUN1 Voltage.............................. –0.3V to (SV
IN
+ 0.6V)
All Other Pins ............................................... –0.3V to 6V
Operating Junction Temperature
Range (Note 2)....................................... –40°C to 125°C
Storage Temperature.............................. –65°C to 150°C
Lead Soldering Temperature (TSSOP) .................. 300°C
Reflow Peak Body Temperature (QFN) .................. 260°C
pin conFiguraTion
PV
IN1
PV
IN1
SW1
FB2
ITH2
VDDQIN
SGND
PV
IN2
PV
IN2
SW2
SW2
2
3
4
5
6
7
8
9
25
PGND
23 ITH1
22 FB1
21 TRACK/SS1
20 SV
IN
19 PV
IN1
18 PV
IN1
17 SW1
16 SW1
15 PGOOD1
14 VTTR
13 PGOOD2
FB1 1
ITH1 2
MODE/SYNC 3
PHASE 4
FB2 5
ITH2 6
7
VDDQIN
8
SGND
9 10 11 12
PV
IN2
PV
IN2
SW2
SW2
25
PGND
SW1
18 PGOOD1
17 VTTR
16 PGOOD2
15 RT
14 RUN1
13 RUN2
SV
IN
PHASE
1
24 MODE/SYNC
TRACK/SS1
TOP VIEW
TOP VIEW
24 23 22 21 20 19
RUN2 10
RUN1 11
RT 12
FE PACKAGE
24-LEAD PLASTIC TSSOP
T
JMAX
= 125°C,
θ
JA
= 33°C/W
EXPOSED PAD (PIN 25) IS PGND, MUST BE SOLDERED TO PCB
UF PACKAGE
24-LEAD (4mm
×
4mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 46.9°C/W
EXPOSED PAD (PIN 25) IS PGND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LTC3618EFE#PBF
LTC3618IFE#PBF
LTC3618EUF#PBF
LTC3618IUF#PBF
TAPE AND REEL
LTC3618EFE#TRPBF
LTC3618IFE#TRPBF
LTC3618EUF#TRPBF
LTC3618IUF#TRPBF
PART MARKING*
LTC3618FE
LTC3618FE
3618
3618
PACKAGE DESCRIPTION
24-Lead Plastic TSSOP
24-Lead Plastic TSSOP
24-Lead (4mm
×
4mm) Plastic QFN
24-Lead (4mm
×
4mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
2
3618fc
For more information
www.linear.com/LTC3618
LTC3618
elecTrical characTerisTics
SYMBOL
V
IN
V
UVLO
OVLO
V
FB1
PARAMETER
Operating Voltage Range
Undervoltage Lockout Threshold
Overvoltage Lockout Threshold
V
DDQ
Feedback Voltage Internal
Reference with Line and Load
Regulation
Feedback Voltage External Reference
(Note 6)
V
FB2
VTTR
I
FB
I
S
V
TT
Feedback Reference Voltage with
Line and Load Regulation
VTTR Output Voltage with Line and
Load Regulation
Feedback Input Current
VTTR Maximum Output Current
Input Supply Current, Active Mode
V
FB1
= 0.5V, V
MODE
= SV
IN
, V
RUN1
= SV
IN
,
V
RUN2
= 0V, (Note 5)
V
FBx
= 0.5V, V
MODE
= SV
IN
, V
RUNx
= SV
IN
,
(Note 5)
Input Supply Current, Shutdown
R
DS(ON)
I
LIMX
I
SW(LKG)
g
m(EA)
I
EAO
t
SOFT-START1
t
SOFT-START2
Top Switch On-Resistance
Bottom Switch On-Resistance
Peak Current Limit
Positive Limit
Negative Limit
Switch Leakage Current
Error Amplifier Transconductance
Error Amplifier Output Current
V
DDQ
Internal Soft-Start Time
V
TT
Internal Soft-Start Time
SV
IN
= PV
IN
= 5.5V, V
RUNx
= 0V
PV
INx
= 3.3V (Note 9)
PV
INx
= 3.3V (Note 9)
Sourcing (Note 7), V
FBX
= 0.5V
Sinking (Note 7), V
FBX
= 0.7V
SV
IN
= PV
IN
= 5.5V, V
RUNx
= 0V
–5µA < I
TH
< 5µA
(Note 4)
V
FB1
from 0.06V to 0.54V,
TRACK/SS1 = SV
IN
V
FB2
from 0V to 0.75V
0.5
0.25
4.2
–2.5
2.4
2.8
0.1
75
55
5.5
–3.5
0.01
240
±30
1.1
0.6
2
1
200
65
R
RT
= 178k
V
RT
= SV
IN
t
LOW
, t
HIGH
> 30ns
l
l
The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2), SV
IN
= PV
INx
= 3.3V, R
T
= 178k, unless otherwise
specified.
CONDITIONS
l
MIN
2.25
1.8
TYP
MAX
5.5
2.2
UNITS
V
V
V
V
mV
SV
IN
Ramping Down
SV
IN
Ramping Up
SV
IN
Ramping Down
Hysteresis
(Note 3) V
TRACK/SS1
= SV
IN
0°C < T
J
< 85°C
–40°C < T
J
< 125°C
(Note 3) V
TRACK/SS1
= 0.3V
(Note 3) V
TRACK/SS1
= 0.5V
VDDQIN = 1.5V
VDDQIN = 1.5V, I
LOAD
= ±10mA,
C
LOAD
= < 0.1µF
V
FBx
= 0.6V
l
l
l
6.2
300
0.592
0.590
0.289
0.489
VTTR – 6
0.6
0.3
0.5
VTTR
0.608
0.610
0.311
0.511
VTTR + 6
0.51 •
V
DDQ
±30
±10
l
V
V
V
V
mV
V
nA
mA
mA
mA
0.49 •
V
DDQ
0.5 •
V
DDQ
0
1
µA
mΩ
mΩ
8.0
–5.5
1
A
A
µA
µmho
µA
ms
ms
Ω
µs
R
ON(TRACK/SS1_DIS)
TRACK/SS1 Pull-Down Resistance
at Start-Up
t
TRACK/SS1_DIS
f
OSC
f
SYNC
V
MODE/SYNC
j
SW1–SW2
Soft-Start Discharge Time at Start-Up
Oscillator Frequency
Internal Default Oscillator Frequency
Synchronization Frequency
SYNC Level High Voltage
SYNC Level Low Voltage
Output Phase Shift Between SW1
and SW2
V
PHASE
< 0.15 •
SV
IN
0.35 •
SV
IN
< V
PHASE
< 0.65 •
SV
IN
V
PHASE
> 0.85 •
SV
IN
0
90
180
1.85
1.8
0.4
1.2
2.25
2.25
2.65
2.7
4
0.3
MHz
MHz
MHz
V
V
Deg
Deg
Deg
3618fc
For more information
www.linear.com/LTC3618
3
LTC3618
The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2), SV
IN
= PV
INx
= 3.3V, R
T
= 178k, unless otherwise
specified.
SYMBOL
V
MODE
(Note 8)
PGOOD1
PARAMETER
V
MODE
High Voltage
V
MODE
Low Voltage
Power Good Voltage Window of
V
DDQ
CONDITIONS
Pulse-Skipping Mode
Forced Continuous Mode
TRACK/SS1 = SV
IN
, Entering Window
V
FB1
Ramping Up
V
FB1
Ramping Down
TRACK/SS1 = SV
IN
, Leaving Window
V
FB1
Ramping Up
V
FB1
Ramping Down
PGOOD2
Power Good Voltage Window of V
TT
Entering Window
V
TT
Ramping Up
V
TT
Ramping Down
Leaving Window
V
FB2
Ramping Up
V
FB2
Ramping Down
t
PGOOD
R
PGOOD
V
RUN
Power Good Blanking Time
V
RUN
Voltage
Pull-Down Resistance
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3618 is tested under pulsed load conditions such that
T
J
≈
T
A
. The LTC3618E is guaranteed to meet performance specifications
over the 0°C to 85°C operating junction temperature range. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls. The LTC3618I is guaranteed to meet specifications over the
full –40°C to 125°C operating junction temperature range. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors. The junction temperature (T
J
, in °C) is calculated from the ambient
temperature (T
A
, in °C) and power dissipation (P
D
, in watts) according to
the formula:
T
J
= T
A
+ (P
D
•
θ
JA
)
where
θ
JA
(in °C/W) is the package thermal impedance.
Note 3:
This parameter is tested in a feedback loop which servos V
FB1
to
the midpoint for the error amplifier (V
ITH1
= 0.75V).
Entering/Leaving Window
Input High
Input Low
l
l
elecTrical characTerisTics
MIN
1.0
TYP
MAX
0.4
UNITS
V
V
%
%
%
%
%
%
%
%
µs
Ω
V
V
MΩ
2
–5
5
8
–8
–5
5
8
–8
105
12
–2
–10.5
10.5
2.5
–2.5
–10.5
65
8
1
10.5
140
30
0.4
Power Good Pull-Down On-Resistance I = 10mA
4
Note 4:
External compensation on ITH pin.
Note 5:
Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 6:
See description of the TRACK/SS pin in the Pin Functions section.
Note 7:
When sourcing current, the average output current is defined
as flowing out of the SW pin. When sinking current, the average output
current is defined as flowing into the SW pin. Sinking mode requires the
use of forced continuous mode.
Note 8:
See description of the MODE pin in the Pin Functions section.
Note 9:
Guaranteed by design and correlation to wafer level measurements
for QFN packages.
Note 10:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability or permanently damage the
国际半导体设备材料产业协会（SEMI）昨（10）日公布半导体设备资本支出的年中预测报告（SEMI Capital Equipment Forecast），预估2012年全球半导体设备营收规模将达到423.8亿美元，2013年将成长至467.1亿美元。
受惠平板电脑、智慧型手机与行动装置等消费性电子商品亮丽表现，半导体设备的采购需求仍将持续。SEMI在报告中指出，2011年半...[详细]
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
