19-2079; Rev 2; 4/09
Dual 1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
General Description
The MAX9312/MAX9314 are low skew, dual 1-to-5 dif-
ferential drivers designed for clock and data distribu-
tion. These devices accept two inputs. Each input is
reproduced at five differential outputs. The differential
inputs can be adapted to accept single-ended inputs
by connecting the on-chip V
BB
supply to one input as a
reference voltage.
The MAX9312/MAX9314 feature low part-to-part skew
(30ps) and output-to-output skew (12ps), making them
ideal for clock and data distribution across a backplane
or a board. For interfacing to differential HSTL and
LVPECL signals, these devices operate over a +2.25V
to +3.8V supply range, allowing high-performance clock
or data distribution in systems with a nominal +2.5V or
+3.3V supply. For differential LVECL operation, these
devices operate from a -2.25V to -3.8V supply.
The MAX9312 features an on-chip V
BB
reference output
of 1.425V below the positive supply voltage. The
MAX9314 offers an on-chip V
BB
reference output of
1.32V below the positive supply voltage.
Both devices are offered in an industry-standard 32-pin
7mm x 7mm LQFP package. In addition, the MAX9312
is offered in a space-saving 32-pin 5mm x 5mm TQFN
package.
Features
o
+2.25V to +3.8V Differential HSTL/LVPECL
Operation
o
-2.25V to -3.8V Differential LVECL Operation
o
30ps (typ) Part-to-Part Skew
o
12ps (typ) Output-to-Output Skew
o
312ps (typ) Propagation Delay
o
≥ 300mV Differential Output at 3GHz
o
On-Chip Reference for Single-Ended Inputs
o
Output Low with Open Input
o
Pin Compatible with MC100LVEP210 (MAX9312)
and MC100EP210 (MAX9314)
o
Offered in Tiny QFN* Package (70% Smaller
Footprint than LQFP)
MAX9312/MAX9314
Ordering Information
PART
MAX9312ECJ+
MAX9312ETJ+
MAX9314ECJ
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
32 LQFP
32 TQFN-EP*
32 LQFP
Applications
Precision Clock Distribution
Low-Jitter Data Repeater
*Exposed
pad.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
Functional Diagram
QA0
V
CC
V
CC
QA0
QA1
QA1
QA2
QA2
75kΩ
75kΩ
QA3
V
EE
V
BB
V
EE
QA3
QA4
QA4
V
EE
V
EE
CLKB
CLKB
75kΩ
75kΩ
QB3
QB3
QB4
QB4
75kΩ
QB0
QB0
QB1
QB1
QB2
QB2
75kΩ
CLKA
CLKA
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Dual 1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
MAX9312/MAX9314
ABSOLUTE MAXIMUM RATINGS
V
CC
- V
EE
...............................................................................4.1V
Inputs (CLK_,
CLK_)
.............................V
EE
- 0.3V to V
CC
+ 0.3V
CLK_ to
CLK_
....................................................................±3.0V
Continuous Output Current .................................................50mA
Surge Output Current........................................................100mA
V
BB
Sink/Source Current ...............................................±0.65mA
Continuous Power Dissipation (T
A
= +70°C)
32-Pin LQFP (derate 20.7mW/°C above +70°C) ....1652.9mW
32-Pin TQFN (derate 34.5mW/°C above +70°C)....2758.6mW
Junction-to-Case Thermal Resistance (T
JC
) (Note A)
32-Pin LQFP ................................................................12°C/W
32-Pin TQFN ..................................................................2°C/W
Junction-to-Ambient Thermal Resistance (T
JA
) (Note 1)
32-Pin LQFP .............................................................48.4°C/W
32-Pin TQFN ................................................................29°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (CLK_,
CLK_,
Q_,
Q_)
........................2kV
Soldering Temperature (10s) ...........................................+300°C
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
- V
EE
= +2.25V to +3.8V, outputs loaded with 50Ω ±1% to V
CC
- 2V.) (Notes 2–5)
PARAMETER
SYMBOL
CONDITIONS
-40°C
MIN
MAX
MIN
+25°C
MAX
MIN
+85°C
MAX
UNITS
INPUTS (CLK_,
CLK
_
)
V
BB
connected MAX9312
to
CLK_
(V
IL
for V
BB
connected MAX9314
to CLK_)
V
BB
connected MAX9312
to
CLK_
(V
IL
for V
BB
connected MAX9314
to CLK_)
V
CC
-
1.23
V
CC
-
1.165
V
CC
V
CC
-
1.23
V
CC
-
1.165
V
CC
V
CC
-
1.23
V
CC
-
1.165
V
CC
V
V
CC
V
CC
V
CC
Single-Ended
Input High
Voltage
V
IH
Single-Ended
Input Low
Voltage
V
EE
V
CC
-
1.62
V
CC
-
1.475
V
CC
V
CC
-
0.095
V
CC
-
V
EE
3.0
150
V
EE
V
CC
-
1.62
V
CC
-
1.475
V
CC
V
CC
-
0.095
V
CC
-
V
EE
3.0
150
V
EE
V
CC
-
1.62
V
V
CC
-
1.475
V
CC
V
CC
-
0.095
V
CC
-
V
EE
3.0
150
µA
µA
V
V
V
IL
V
EE
V
EE
+
1.2
V
EE
V
EE
V
EE
+
1.2
V
EE
0.095
0.095
V
EE
V
EE
+
1.2
V
EE
0.095
0.095
High Voltage of
Differential Input
Low Voltage of
Differential Input
Differential Input
Voltage
Input High
Current
CLK_ Input Low
Current
V
IHD
V
ILD
V
IHD
-
V
ILD
I
IH
I
ILCLK
For V
CC
- V
EE
<
3.0V
For V
CC
- V
EE
≥
3.0V
0.095
0.095
V
-10
+10
-10
+10
-10
+10
2
_______________________________________________________________________________________
Dual 1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
- V
EE
= +2.25V to +3.8V, outputs loaded with 50Ω ±1% to V
CC
- 2V.) (Notes 2–5)
PARAMETER
CLK_
Input Low
Current
SYMBOL
I
ILCLK
CONDITIONS
-40°C
MIN
-150
MAX
MIN
-150
+25°C
MAX
MIN
-150
+85°C
MAX
UNITS
µA
MAX9312/MAX9314
OUTPUTS (Q__,
Q
__
)
Single-Ended
Output High
Voltage
Single-Ended
Output Low
Voltage
Differential
Output Voltage
V
OH
Figure 1
V
CC
-
1.025
V
CC
-
0.900
V
CC
-
1.025
V
CC
-
0.900
V
CC
-
1.025
V
CC
-
0.900
V
V
OL
V
OH
-
V
OL
Figure 1
V
CC
-
-1.930
670
V
CC
-
1.695
950
V
CC
-
-1.930
670
V
CC
-
1.695
950
V
CC
-
-1.930
670
V
CC
-
1.695
950
V
Figure 1
mV
REFERENCE (V
BB
)
Reference
Voltage Output
(Note 6)
POWER SUPPLY
Supply Current
(Note 7)
MAX9312
V
BB
I
BB
=
±0.5mA
MAX9314
V
CC
-
1.525
V
CC
-
1.38
V
CC
-
1.325
V
CC
-
1.26
V
CC
-
1.525
V
CC
-
1.38
V
CC
-
1.325
V
CC
-
1.26
V
CC
-
1.525
V
CC
-
1.38
V
CC
-
1.325
V
V
CC
-
1.26
I
EE
75
82
95
mA
_______________________________________________________________________________________
3
Dual 1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
MAX9312/MAX9314
AC ELECTRICAL CHARACTERISTICS
(V
CC
- V
EE
= +2.25V to +3.8V, outputs loaded with 50Ω ±1% to V
CC
- 2V, input frequency = 1.5GHz, input transition time = 125ps
(20% to 80%), V
IHD
= V
EE
+ 1.2V to V
CC
, V
ILD
= V
EE
to V
CC
- 0.15V, V
IHD
- V
ILD
= 0.15V to the smaller of 3V or V
CC
- V
EE
, unless oth-
erwise noted. Typical values are at V
CC
- V
EE
= 3.3V, V
IHD
= V
CC
- 1V, V
ILD
= V
CC
- 1.5V.) (Note 8)
PARAMETER
Differential Input-
to-Output Delay
Output-to-Output
Skew (Note 9)
Part-to-Part Skew
(Note 10)
Added Random
Jitter (Note 11)
Added
Deterministic
Jitter (Note 11)
SYMBOL
t
PLHD
,
t
PHLD
t
SKOO
t
SKPP
f
IN
= 1.5GHz
clock pattern
f
IN
= 3.0GHz
clock pattern
3Gbps,
2
23
-1 PRBS pattern
V
OH
- V
OL
≥
300mV,
clock pattern, Figure 2
f
MAX
V
OH
- V
OL
≥
500mV,
clock pattern, Figure 2
Figure 2
1.5
100
112
140
CONDITIONS
Figure 2
-40°C
MIN
220
TYP
321
12
30
1.2
1.2
MAX
380
46
160
2.5
2.6
MIN
220
+25°C
TYP
312
12
30
1.2
1.2
MAX
410
46
190
2.5
2.6
MIN
260
+85°C
TYP
322
10
30
1.2
1.2
MAX
400
35
140
2.5
2.6
UNITS
ps
ps
ps
t
RJ
ps
(RMS)
t
DJ
80
95
80
95
80
95
ps
(pk-pk)
3.0
1.5
100
3.0
1.5
116
140
100
3.0
GHz
Switching
Frequency
Output Rise/Fall
Time (20% to 80%)
t
R
, t
F
121
140
ps
Note 2:
Measurements are made with the device in thermal equilibrium.
Note 3:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 4:
Single-ended input operation using V
BB
is limited to V
CC
- V
EE
= 3.0V to 3.8V for the MAX9312 and V
CC
- V
EE
= 2.7V to
3.8V for the MAX9314.
Note 5:
DC parameters production tested at T
A
= +25°C. Guaranteed by design and characterization over the full operating temper-
ature range.
Note 6:
Use V
BB
only for inputs that are on the same device as the V
BB
reference.
Note 7:
All pins open except V
CC
and V
EE
.
Note 8:
Guaranteed by design and characterization limits are set at ±6 sigma.
Note 9:
Measured between outputs on the same part at the signal crossing points for a same-edge transition.
Note 10:
Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.
Note 11:
Device jitter added to the input signal.
4
_______________________________________________________________________________________
Dual 1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
MAX9312/MAX9314
Typical Operating Characteristics
(V
CC
= +3.3V, V
EE
= 0, V
IHD
= V
CC
- 0.95V, V
ILD
= V
CL
- 1.25V, input transition time = 125ps (20% to 80%), f
IN
= 1.5GHz, outputs
loaded with 50Ω to V
CC
- 2V, T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT, I
EE
vs. TEMPERATURE
MAX9312 toc01
OUTPUT AMPLITUDE (V
OH
- V
OL
)
vs. FREQUENCY
MAX9312 toc02
TRANSITION TIME vs. TEMPERATURE
t
R
125
TRANSITION TIME (ps)
120
115
110
105
100
95
90
t
F
MAX9312 toc03
80
75
SUPPLY CURRENT (mA)
70
65
60
55
0.9
0.8
OUTPUT AMPLITUDE (V)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
130
50
-40
0
-15
10
35
60
85
0
1000
2000
3000
TEMPERATURE (°C)
FREQUENCY (MHz)
-40
-15
10
35
60
85
TEMPERATURE (°C)
MAX9312 toc04
304
PROPAGATION DELAY (ps)
302
300
298
296
294
292
290
288
1.0
1.4
1.8
2.2
t
PHLD
t
PLHD
V
IHD
-V
ILD
= 150mV
V
IHD
= V
CC
- 0.95V
V
ILD
= V
CC
- 1.1V
PROPAGATION DELAY (ps)
320
t
PLHD
300
t
PHLD
280
2.6
3.0
3.4
3.8
-40
-15
10
35
60
85
V
IHD
(V)
TEMPERATURE (°C)
_______________________________________________________________________________________
MAX9312 toc05
306
PROPAGATION DELAY vs.
SINGLE-ENDED HIGH VOLTAGE OF
DIFFERENTIAL INPUT (V
IHD
)
PROPAGATION DELAY vs. TEMPERATURE
340
5
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